NE56612-42GW

更新时间： 2024-01-14 19:59:32

品牌	Logo	应用领域
恩智浦 - NXP		电源电路电源管理电路微处理器光电二极管
页数	文件大小	规格书
9页	126K
描述
Family of devices designed to generate a reset signal for a variety of microprocessor and logic systems

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技术参数
数据手册

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NE56612-42GW 技术参数

生命周期：	Obsolete	零件包装代码：	SOT-23
包装说明：	LSSOP,	针数：	5
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.84
可调阈值：	NO	模拟集成电路 - 其他类型：	POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码：	R-PDSO-G5	长度：	2.85 mm
信道数量：	1	功能数量：	1
端子数量：	5	最高工作温度：	75 °C
最低工作温度：	-20 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH	认证状态：	Not Qualified
座面最大高度：	1.35 mm	最大供电电压 (Vsup)：	12 V
最小供电电压 (Vsup)：	0.65 V	标称供电电压 (Vsup)：	10 V
表面贴装：	YES	温度等级：	COMMERCIAL EXTENDED
端子形式：	GULL WING	端子节距：	0.95 mm
端子位置：	DUAL	宽度：	1.6 mm
Base Number Matches：	1

NE56612-42GW 数据手册

NE56610/11/12 Series

System Reset

Rev 0

February, 2001

Preliminary Product Specification

General Description

The NE56610/11/12 series is a family of devices designed to generate a reset signal for a

variety of microprocessor and logic systems. Accurate reset signals are generated during

momentary power interruptions or when ever power supply voltages sag to intolerable levels.

The NE56610/11/12 incorporates an internal timer to provide reset delay and ensure proper

operating voltage has been attained. In addition, a manual reset pin is available. An Open

Collector output topology is incorporated to provide adaptability for a wide variety of logic and

microprocessor systems.

VCC

M/R

SUB

GND

V^OUT

TSSOP5

NE56610/11/12 is available in the TSSOP5 surface mount package.

Features

• 12V DC Maximum Operating Voltage

• Low Operating Voltage (0.65 V)

• Internal Reset Delay Timer

• NE56610 (50 mS Typical)

• Offered in Reset Thresholds of 2.0, 2.7, 2.8, 2.9, 3.0, 3.1, 4.2,

4.3, 4.4, 4.5, 4.7 V DC

• Available in SSOP5 Surface Mount Package

• Manual Reset Input

• NE56611 (100mS Typical)

• NE56612 (200mS Typical)

Applications

• Micro-Computer Systems

• Logic Systems

• Battery Monitoring Systems

• Back-Up Power Supply Circuits

• Voltage Detection Circuits

• Mechanical Reset Circuits

Simplified Device Diagram

VCC

NE56610/11/12

VOUT

Reset

Delay

GND

VREF

M/R

SUB

Ordering Information

Description

Temperature Range

Order Code

DWG#

5-pin SOT23 (TSSOP5) plastic surface mount

-20 - +75 °C

NE56610-xxGW

NE56611-xxGW

NE56612-xxGW

TSSOP5

System Reset (100mS Typical Internal Reset Delay)

System Reset (200mS Typical Internal Reset Delay)

Note: Each device has 6 (six) detection voltage options, indicated by the -xx on the order code:

Detect Voltage (Typ.)

-25

-27

-29

2.5

2.7

2.9

-39

-42

-45

3.9

4.2

4.5

12 3 4 5 6 7...9

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NE56612-45GW	NXP	Family of devices designed to generate a reset signal for a variety of microprocessor and	获取价格
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