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NCP1252EDR2G

更新时间： 2022-02-26 11:35:21
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
20页 191K
描述
Current Mode PWM Controller for Forward and Flyback Applications

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NCP1252EDR2G 数据手册

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NCP1252  
Table 3. ELECTRICAL CHARATERISTICS  
(V = 15 V, R = 43 kW, C  
= 1 nF. For typical values T = 25°C, for min/max values T = –25°C to +125°C, unless otherwise noted)  
CC  
T
DRV  
J
J
Characteristics  
Test Condition  
Symbol  
Min  
Typ  
Max  
Unit  
SUPPLY SECTION AND V MANAGEMENT  
CC  
Startup threshold at which driving pulses  
are authorized  
V
increasing  
V
V
CC  
CC(on)  
CC(off)  
A, B, C versions  
D & E versions  
9.4  
13.1  
10  
14  
10.6  
14.9  
Minimum Operating voltage at which driving pulses  
are stopped  
V
CC  
decreasing  
V
8.4  
9
9.6  
V
V
Hysteresis between V  
and V  
A, B and C versions  
D & E versions  
V
CC(HYS)  
0.9  
4.5  
1.0  
5.0  
−
−
CC(on)  
CC(min)  
Start−up current, controller disabled  
V
CC  
< V  
& V increasing  
from zero  
I
−
−
100  
mA  
CC(on)  
CC  
CC1  
Internal IC consumption, controller switching  
Internal IC consumption, controller switching  
CURRENT COMPARATOR  
F
=100 kHz, DRV = open  
I
I
0.5  
2.0  
1.4  
2.7  
2.2  
3.5  
mA  
mA  
sw  
CC2  
F
sw  
=100 kHz, C  
= 1 nF  
DRV  
CC3  
Current Sense Voltage Threshold  
Leading Edge Blanking Duration  
Input Bias Current  
V
0.92  
−
1
1.08  
−
V
ILIM  
t
160  
0.02  
70  
ns  
mA  
ns  
LEB  
(Note 3)  
I
−
−
bias  
ILIM  
Propagation delay  
From CS detected to gate  
turned off  
t
−
150  
Internal Ramp Compensation Voltage level  
Internal Ramp Compensation resistance to CS pin  
INTERNAL OSCILLATOR  
@ 25°C (Note 4)  
@ 25°C (Note 4)  
V
3.15  
−
3.5  
3.85  
−
V
ramp  
R
26.5  
kW  
ramp  
Oscillator Frequency  
R = 43 kW & DRV pin = 47 kW  
f
f
92  
425  
−
100  
500  
5
108  
550  
−
kHz  
kHz  
%
T
OSC  
Oscillator Frequency  
R = 8.5 kW & DRV pin = 47 kW  
T
OSC  
Frequency Modulation in percentage of f  
(Note 3)  
(Note 3)  
(Note 3)  
f
jitter  
OSC  
Frequency modulation Period  
T
swing  
−
3.33  
−
−
ms  
kHz  
%
Maximum operating frequency  
Maximum duty−cycle – A version  
Maximum duty−cycle – B version  
Maximum duty−cycle – C version  
Maximum duty−cycle – D & E versions  
FEEDBACK SECTION  
f
500  
45.6  
76  
−
MAX  
DC  
48  
49.6  
84  
maxA  
maxB  
maxC  
maxD  
DC  
80  
%
DC  
DC  
61  
65  
69  
%
44.2  
45.6  
47.2  
%
Internal voltage division from FB to CS setpoint  
Internal pull−up resistor  
FB  
−
−
3
3.5  
−
−
−
−
−
−
−
−
kW  
mA  
kW  
V
div  
R
pull−up  
FB pin maximum current  
FB pin = GND  
I
FB  
1.5  
−
Internal feedback impedance from FB to GND  
Open loop feedback voltage  
Internal Diode forward voltage  
DRIVE OUTPUT  
Z
FB  
40  
FB pin = open  
(Note 3)  
V
FBOL  
−
6.0  
0.75  
V
−
V
f
DRV Source resistance  
R
−
−
−
10  
6
30  
19  
−
W
W
SRC  
DRV Sink resistance  
R
SINK  
Output voltage rise−time  
V
CC  
= 15 V, C  
= 1 nF,  
t
r
26  
ns  
DRV  
10 to 90%  
3. Guaranteed by design  
4. V  
, R  
Guaranteed by design  
ramp  
ramp  
www.onsemi.com  
4
 
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