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NCH43JC-0.5000(T) PDF预览

NCH43JC-0.5000(T)

更新时间: 2024-02-18 22:57:31
品牌 Logo 应用领域
美台 - DIODES /
页数 文件大小 规格书
3页 1354K
描述
Oscillator, 0.5MHz Min, 6MHz Max, 0.5MHz Nom, Hybrid,

NCH43JC-0.5000(T) 技术参数

生命周期:TransferredReach Compliance Code:unknown
风险等级:5.57安装特点:SURFACE MOUNT
端子数量:4最大工作频率:6 MHz
最小工作频率:0.5 MHz标称工作频率:0.5 MHz
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:METAL封装等效代码:GWDIP4/8,.5
电源:5 V认证状态:Not Qualified
子类别:Other Oscillators最大压摆率:12 mA
标称供电电压:5 V表面贴装:YES
技术:HYBRIDBase Number Matches:1

NCH43JC-0.5000(T) 数据手册

 浏览型号NCH43JC-0.5000(T)的Datasheet PDF文件第2页浏览型号NCH43JC-0.5000(T)的Datasheet PDF文件第3页 
SaRonix  
Crystal Clock Oscillator  
5V, HCMOS  
NTH / NCH Series  
Technical Data  
Frequency Range:  
500 kHz to 106.25 MHz  
20*ꢀ 25ꢀ 50 or 100 ppm oꢁer all conditions: calibration  
Frequency Stability:  
toleranceꢀ operating temperatureꢀ input ꢁoltage changeꢀ load  
changeꢀ 30 day agingꢀ shock and ꢁibration.  
*See Part Numbering Guide  
Temperature Range:  
Operating:  
Storage:  
0 to +70°C or -40 to +85°C  
-55 to +125°C  
Supply Voltage:  
Recommended Operating:  
+5VDC 10%  
0.5 to 8 MHz:  
8+ to 24 MHz:  
24+ to 50 MHz:  
50+ to 80 MHz  
12mA  
20mA  
35mA  
50mA  
65mA  
Supply  
Current:  
ACTUAL SIZE  
80+ to 106.25 MHz:  
Description  
Output Drive:  
Symmetry:  
Rise & Fall Times:  
measured @ 50%V  
8ns maxꢀ 0.5 to 24 MHzꢀ 20% to 80% V  
5ns maxꢀ 24+ to 80 MHz  
See Part Numbering Guide  
DDꢀ  
HCMOS  
A 5V crystal controlledꢀ low currentꢀ low  
jitter and high frequency oscillator with  
precise rise and fall times demanded in  
networking applicationsꢀ such as Gigabit  
EthernetandFibreChannel. Thetri-state  
function on the NTH enables the output  
to go high impedance. Deꢁice is pack-  
aged in a 14 or an 8-pin DIP compatible  
resistance weldedꢀ all metal grounded  
caseꢀ to reduce EMI. True SMD DIL 14  
ꢁersion also aꢁailableꢀ utilizing new  
adaptor technology (see separate data  
sheet for package dimensions)  
DD  
2ns maxꢀ 80+ to 106.25 MHz  
Logic 0:  
Logic 1:  
Load:  
10% V  
90% V  
max  
min  
DD  
DD  
50pF to 50MHzꢀ 30pF 50+ to 70 MHzꢀ 15pF 70+ to 106.25 MHz  
8ps max  
RMS Period Jitter:  
TTL  
Symmetry:  
Rise & Fall Times:  
measured @ 1.5V leꢁelꢀ See Part Numbering Guide  
6ns maxꢀ 0.5 to 24 MHzꢀ 0.5 to 2.5V  
3ns maxꢀ 24+ to 80 MHz  
1.5ns maxꢀ 80+ to 106.25 MHz  
0.5 V max  
Logic 0:  
Logic 1:  
Load:  
V
-0.6V min  
CC  
10TTL to 50MHzꢀ 5TTL 50+ to 106.25 MHz  
8ps max  
RMS Period Jitter:  
Applications & Features  
Mechanical:  
• ADSLꢀ DSL  
Shock:  
Solderability:  
Terminal Strength:  
Vibration:  
Solꢁent Resistance:  
MIL-STD-883ꢀ Method 2002ꢀ Condition B  
MIL-STD-883ꢀ Method 2003  
MIL-STD-883ꢀ Method 2004ꢀ Conditions B2  
MIL-STD-883ꢀ Method 2007ꢀ Condition A  
MIL-STD-202ꢀ Method 215  
• DS3ꢀ ES3ꢀ E1ꢀ STS-1ꢀ T1  
• Ethernet Switchꢀ Gigabit Ethernet  
• Fibre Channel Controller  
• MPEG  
Resistance to Soldering Heat:  
MIL-STD-202ꢀ Method 210ꢀ Condition Aꢀ B or C  
( I or J for Gull Wing and SMD)  
• Network Processors  
• Voice Oꢁer Packet  
• 32 Bit Microprocessors  
• Tri-State output on NTH  
• True SMD ꢁersion aꢁailableꢀ see part  
number builder for package option  
Environmental:  
Gross Leak Test:  
Fine Leak Test:  
Thermal Shock:  
MIL-STD-883ꢀ Method 1014ꢀ Condition C  
MIL-STD-883ꢀ Method 1014ꢀ Condition A2  
MIL-STD-883ꢀ Method 1011ꢀ Condition A  
MIL-STD-883ꢀ Method 1004  
Moisture Resistance:  
Output Waveform  
Tri-State Logic Table (NTH only)  
CMOS  
TTL  
Pin 1 Input  
Logic 1 or NC  
Logic 0 or GND  
Pin 8 (5) Output  
Required Input Levels on Pin 1:  
Logic 1 = 3.0 V min  
Logic 0 = 0.5V max  
T
T
T
T
f
r
f
r
Oscillation  
V
1 Level  
DD  
High Impedance  
80% V  
DD  
DD  
Output:  
Oscillation @ V ꢀ 2.2V min  
IN  
High Impedance @ V ꢀ 0.8V max  
IN  
50Kmin  
Disable Output Delay: 100ns max  
50% V  
20% V  
2.5 VDC  
1.5 VDC  
0.5 VDC  
Output:  
Internal Pullup Resistance  
Control Input:  
DD  
0 Level  
GND  
SYMMETRY  
SYMMETRY  
DS-104 REV F  
http://www.pericom.com/saronix  
SaRonix  

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