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NAND01GW3B2AN6E PDF预览

NAND01GW3B2AN6E

更新时间: 2024-02-18 22:07:37
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器光电二极管内存集成电路
页数 文件大小 规格书
60页 1272K
描述
128MX8 FLASH 3V PROM, 25000ns, PDSO48, 12 X 20 MM, LEAD FREE, PLASTIC, TSOP-48

NAND01GW3B2AN6E 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TSOP包装说明:TSOP1, TSSOP48,.8,20
针数:48Reach Compliance Code:unknown
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.22最长访问时间:25000 ns
命令用户界面:YES数据轮询:NO
JESD-30 代码:R-PDSO-G48JESD-609代码:e3/e6
长度:18.4 mm内存密度:1073741824 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1部门数/规模:1K
端子数量:48字数:134217728 words
字数代码:128000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128MX8封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装等效代码:TSSOP48,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
页面大小:2K words并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:3/3.3 V
编程电压:3 V认证状态:Not Qualified
就绪/忙碌:YES座面最大高度:1.2 mm
部门规模:128K最大待机电流:0.00005 A
子类别:Flash Memories最大压摆率:0.03 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN/TIN BISMUTH端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED切换位:NO
类型:NAND TYPE宽度:12 mm
Base Number Matches:1

NAND01GW3B2AN6E 数据手册

 浏览型号NAND01GW3B2AN6E的Datasheet PDF文件第4页浏览型号NAND01GW3B2AN6E的Datasheet PDF文件第5页浏览型号NAND01GW3B2AN6E的Datasheet PDF文件第6页浏览型号NAND01GW3B2AN6E的Datasheet PDF文件第8页浏览型号NAND01GW3B2AN6E的Datasheet PDF文件第9页浏览型号NAND01GW3B2AN6E的Datasheet PDF文件第10页 
NAND01G-B2B, NAND02G-B2C  
Description  
1
Description  
NAND01G-B2B and NAND02G-B2C flash 2112-byte/1056-word page is a family of non-  
volatile flash memories that uses NAND cell technology. The devices range from 1 Gbit to 2  
Gbits and operate with either a 1.8 V or 3 V voltage supply. The size of a page is either 2112  
bytes (2048 + 64 spare) or 1056 words (1024 + 32 spare) depending on whether the device  
has a x8 or x16 bus width.  
The address lines are multiplexed with the Data Input/Output signals on a multiplexed x8 or  
x16 input/output bus. This interface reduces the pin count and makes it possible to migrate  
to other densities without changing the footprint.  
Each block can be programmed and erased over 100 000 cycles (with ECC on). To extend  
the lifetime of NAND flash devices it is strongly recommended to implement an error  
correction code (ECC).  
The devices feature a write protect pin that allows performing hardware protection against  
program and erase operations.  
The devices feature an open-drain ready/busy output that can be used to identify if the  
program/erase/read (P/E/R) controller is currently active. The use of an open-drain output  
allows the ready/busy pins from several memories to be connected to a single pull-up  
resistor.  
A Copy Back Program command is available to optimize the management of defective  
blocks. When a page program operation fails, the data can be programmed in another page  
without having to resend the data to be programmed.  
Each device has cache program and cache read features which improve the program and  
read throughputs for large files. During cache programming, the device loads the data in a  
cache register while the previous data is transferred to the page buffer and programmed into  
the memory array. During cache reading, the device loads the data in a cache register while  
the previous data is transferred to the I/O buffers to be read.  
All devices have the chip enable don’t care feature, which allows code to be directly  
downloaded by a microcontroller, as chip enable transitions during the latency time do not  
stop the read operation.  
All devices have the option of a unique identifier (serial number), which allows each device  
to be uniquely identified.  
The unique identifier options is subject to an NDA (non disclosure agreement) and so not  
described in the datasheet. For more details of this option contact your nearest Numonyx  
sales office.  
The devices are available in the following packages:  
TSOP48 (12 x 20 mm)  
VFBGA63 (9.5 x 12 x 1 mm, 0.8 mm pitch) for NAND02G-B2C devices  
VFBGA63 (9 x 11 x 1 mm, 0.8 mm pitch) for NAND01G-B2B devices.  
For information on how to order these options refer to Table 29: Ordering information  
scheme. Devices are shipped from the factory with Block 0 always valid and the memory  
content bits, in valid blocks, erased to ’1’.  
See Table 2: Product description, for all the devices available in the family.  
7/60  

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