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N80930AD4 PDF预览

N80930AD4

更新时间: 2022-11-26 13:52:12
品牌 Logo 应用领域
英特尔 - INTEL 微控制器
页数 文件大小 规格书
38页 278K
描述
UNIVERSAL SERIAL BUS MICROCONTROLLER

N80930AD4 数据手册

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ADVANCE INFORMATION  
8x930Ax  
UNIVERSAL SERIAL BUS  
MICROCONTROLLER  
Complete Universal Serial Bus  
Low Clock Mode  
Specification 1.0 Compatibility  
User-selectable Configurations  
— External Wait State  
— Address Range  
— Supports Isochronous and  
Non-isochronous Data  
— Bidirectional Half-duplex Link  
— Page Mode  
On-chip USB Transceiver  
Real-time Wait Function  
Serial Bus Interface Engine (SIE)  
— Packet Decoding/Generation  
— CRC Generation and Checking  
256-Kbyte External Code/Data Memory  
Space  
On-chip ROM Options  
— NRZI Encoding/Decoding and  
Bit-stuffing  
— 0, 8, or 16 Kbytes  
1 Kbyte On-chip Data RAM  
Four Input/Output Ports  
— 1 Open-drain port  
USB Reset Interrupt  
Four Transmit FIFOs  
— Three 16-byte FIFOs  
— 3 Quasi-bidirectional Ports  
— One Configurable FIFO (up to  
1 Kbyte)  
Programmable Counter Array (PCA)  
— 5 Capture/Compare Modules  
Four Receive FIFOs  
Serial I/O Port (UART)  
— Three 16-byte FIFOs  
Hardware Watchdog Timer  
Three Flexible 16-bit Timer/Counters  
— One Configurable FIFO (up to  
1 Kbyte)  
Automatic Transmit/Receive FIFO  
Power-saving Idle and Powerdown  
Management  
Modes  
Register-based MCS® 251 Architecture  
Suspend/Resume Operation  
Three New USB Interrupt Vectors  
— USB Function Interrupt  
— Start of Frame  
— 40-byte Register File  
— Registers Accessible as Bytes,  
Words, or Doublewords  
Code Compatible with MCS 51 and MCS  
— Suspend/Resume  
251 Microcontrollers  
Phase-locked Loop  
6 or 12 MHz Crystal Operation  
— 12 Mbps or 1.5 Mbps Data Rate  
The 8x930Ax USB microcontroller is based on an 8xC251Sx microcontroller core. It consists of standard  
8xC251Sx peripherals plus an added USB function. The 8x930Ax uses the standard instruction set of the  
MCS 251 architecture, which is binary code compatible with the MCS 51 architecture. The USB function  
integrates the USB transceiver, serial bus interface engine (SIE), function interface unit (FIU) and  
transmit/receive FIFOs. The USB function also supports full-speed/low-speed data rates, suspend/resume  
modes, isochronous/non-isochronous transfers, and is fully compliant with the USB rev 1.0 specification.  
COPYRIGHT © INTEL CORPORATION, 1997  
February 1997  
Order Number: 272917-003  

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