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N02L163WC2AB2-55I PDF预览

N02L163WC2AB2-55I

更新时间: 2024-01-01 11:26:28
品牌 Logo 应用领域
NANOAMP 静态存储器内存集成电路
页数 文件大小 规格书
11页 274K
描述
Standard SRAM, 128KX16, 55ns, CMOS, PBGA48

N02L163WC2AB2-55I 技术参数

是否Rohs认证:符合生命周期:Contact Manufacturer
包装说明:FBGA, BGA48,6X8,30Reach Compliance Code:unknown
风险等级:5.8Is Samacsys:N
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
端子数量:48字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:FBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, FINE PITCH并行/串行:PARALLEL
电源:3/3.3 V认证状态:Not Qualified
最小待机电流:1.8 V子类别:SRAMs
最大压摆率:0.016 mA表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOMBase Number Matches:1

N02L163WC2AB2-55I 数据手册

 浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第1页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第2页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第3页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第5页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第6页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第7页 
NanoAmp Solutions, Inc.  
N02L163WC2A  
1
Absolute Maximum Ratings  
Item  
Symbol  
VIN,OUT  
VCC  
Rating  
–0.3 to VCC+0.3  
–0.3 to 4.5  
500  
Unit  
V
Voltage on any pin relative to VSS  
Voltage on VCC Supply Relative to VSS  
Power Dissipation  
V
PD  
mW  
oC  
oC  
oC  
TSTG  
Storage Temperature  
–40 to 125  
TA  
Operating Temperature  
-40 to +85  
260oC, 10sec  
TSOLDER  
Soldering Temperature and Time  
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any other conditions above those indicated in the operating section of this specification is not  
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.  
Operating Characteristics (Over Specified Temperature Range)  
Typ1  
Item  
Symbol  
Test Conditions  
Min.  
Max  
Unit  
VCC  
VDR  
VIH  
VIL  
Supply Voltage  
Data Retention Voltage  
Input High Voltage  
2.3  
1.8  
3.0  
3.6  
3.6  
VCC+0.3  
0.6  
V
V
Chip Disabled3  
1.8  
V
Input Low Voltage  
–0.3  
V
VOH  
VOL  
ILI  
IOH = 0.2mA  
IOL = -0.2mA  
VCC–0.2  
Output High Voltage  
Output Low Voltage  
Input Leakage Current  
Output Leakage Current  
V
0.2  
0.5  
0.5  
V
VIN = 0 to VCC  
µA  
µA  
ILO  
OE = VIH or Chip Disabled  
VCC=3.6 V, VIN=VIH or VIL  
Chip Enabled, IOUT = 0  
Read/Write Operating Supply Current  
ICC1  
ICC2  
2.0  
4.0  
mA  
mA  
@ 1 µs Cycle Time2  
VCC=3.6 V, VIN=VIH or VIL  
Chip Enabled, IOUT = 0  
Read/Write Operating Supply Current  
12.0  
16.0  
@ 70 ns Cycle Time2  
Page Mode Operating Supply Current  
@ 70ns Cycle Time2 (Refer to Power  
Savings with Page Mode Operation  
diagram)  
VCC=3.6 V, VIN=VIH or VIL  
Chip Enabled, IOUT = 0  
ICC3  
4.0  
2.0  
mA  
mA  
VCC=3.6 V, VIN=VIH or VIL  
Chip Enabled, IOUT = 0,  
f = 0  
Read/Write Quiescent Operating Sup-  
ply Current3  
ICC4  
3.0  
VIN = VCC or 0V  
Chip Disabled  
Maximum Standby Current3  
ISB1  
20.0  
10.0  
µA  
µA  
tA= 85oC, VCC = 3.6 V  
Vcc = 1.8V, VIN = VCC or 0  
Chip Disabled, tA= 85oC  
Maximum Data Retention Current3  
IDR  
1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested.  
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive  
output capacitance expected in the actual system.  
3. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all  
inputs must be within 0.2 volts of either VCC or VSS.  
(DOC# 14-02-013 REV G ECN# 01-1270)  
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.  
4

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