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N02L163WC2AB2-55I PDF预览

N02L163WC2AB2-55I

更新时间: 2024-01-11 13:43:21
品牌 Logo 应用领域
NANOAMP 静态存储器内存集成电路
页数 文件大小 规格书
11页 274K
描述
Standard SRAM, 128KX16, 55ns, CMOS, PBGA48

N02L163WC2AB2-55I 技术参数

是否Rohs认证:符合生命周期:Contact Manufacturer
包装说明:FBGA, BGA48,6X8,30Reach Compliance Code:unknown
风险等级:5.8Is Samacsys:N
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
端子数量:48字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:FBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, FINE PITCH并行/串行:PARALLEL
电源:3/3.3 V认证状态:Not Qualified
最小待机电流:1.8 V子类别:SRAMs
最大压摆率:0.016 mA表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOMBase Number Matches:1

N02L163WC2AB2-55I 数据手册

 浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第1页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第2页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第4页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第5页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第6页浏览型号N02L163WC2AB2-55I的Datasheet PDF文件第7页 
NanoAmp Solutions, Inc.  
Functional Block Diagram  
N02L163WC2A  
Word  
Address  
Inputs  
Address  
Decode  
Logic  
A0 - A3  
Input/  
Page  
32K Page  
x 16 word  
x 16 bit  
Address  
Inputs  
Output  
I/O0 - I/O7  
Mux  
Address  
Decode  
Logic  
A4 - A16  
and  
RAM Array  
Buffers  
I/O8 - I/O15  
CE1  
CE2  
WE  
OE  
Control  
Logic  
UB  
LB  
Functional Description  
1
CE1  
CE2  
WE  
OE  
UB  
LB  
MODE  
POWER  
I/O0 - I/O15  
Standby2  
Standby2  
H
X
L
L
L
L
X
L
H
H
H
H
X
X
X
L
X
X
X
X3  
L
X
X
H
L1  
L1  
L1  
X
X
H
L1  
L1  
L1  
High Z  
High Z  
High Z  
Data In  
Data Out  
High Z  
Standby  
Standby  
Standby  
Active  
Standby  
Write3  
Read  
Active  
H
H
Active  
H
Active  
1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7  
are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown.  
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally  
isolated from any external influence and disabled from exerting any influence externally.  
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.  
1
Capacitance  
Item  
Symbol  
CIN  
Test Condition  
Min  
Max  
8
Unit  
pF  
VIN = 0V, f = 1 MHz, TA = 25oC  
VIN = 0V, f = 1 MHz, TA = 25oC  
Input Capacitance  
I/O Capacitance  
CI/O  
8
pF  
1. These parameters are verified in device characterization and are not 100% tested  
(DOC# 14-02-013 REV G ECN# 01-1270)  
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.  
3

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