Datasheet > N01L1618N1AB2

N01L1618N1AB2

更新时间： 2024-02-15 00:15:24

品牌	Logo	应用领域
NANOAMP		静态存储器
页数	文件大小	规格书
10页	223K
描述
1Mb Ultra-Low Power Asynchronous CMOS SRAM

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N01L1618N1AB2 技术参数

NanoAmp Solutions, Inc.

Power Savings with Page Mode Operation (WE = V )

N01L1618N1A

Page Address (A4 - A15 )

Word Address (A0 - A3)

Open page

...

Word 16

Word 1

Word 2

LB, UB

Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal

organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power

saving feature.

The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open

and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant

bits and addressing the 16 words within the open page, power is reduced to the page mode value which is

considerably lower than standard operating currents for low power SRAMs.

(DOC# 14-02-009 REV F ECN# 01-0995)

The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.

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