Datasheet > MX26C1000AQC-90

MX26C1000AQC-90

更新时间： 2024-01-18 01:40:34

品牌	Logo	应用领域
旺宏电子 - Macronix		可编程只读存储器电动程控只读存储器
页数	文件大小	规格书
16页	87K
描述
1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

MX26C1000AQC-90 技术参数

生命周期：	Obsolete	零件包装代码：	LCC
包装说明：	PLASTIC, MO-052, LCC-32	针数：	32
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	风险等级：	5.84
最长访问时间：	90 ns	其他特性：	100 ERASE/PROGRAM CYCLES MIN
命令用户界面：	NO	数据轮询：	NO
JESD-30 代码：	R-PQCC-J32	JESD-609代码：	e0
长度：	14.0462 mm	内存密度：	1048576 bit
内存集成电路类型：	EEPROM	内存宽度：	8
功能数量：	1	端子数量：	32
字数：	131072 words	字数代码：	128000
工作模式：	ASYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	128KX8
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装等效代码：	LDCC32,.5X.6	封装形状：	RECTANGULAR
封装形式：	CHIP CARRIER	并行/串行：	PARALLEL
电源：	5 V	编程电压：	12 V
认证状态：	Not Qualified	座面最大高度：	3.55 mm
最大待机电流：	0.0001 A	子类别：	EEPROMs
最大压摆率：	0.03 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	TIN LEAD
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	QUAD	切换位：	NO
宽度：	11.5062 mm	Base Number Matches：	1

MX26C1000AQC-90 数据手册

INDEX

MX26C1000A

This assures that all deselected memory devices are in

their low-power standby mode and that the output pins

are only active when data is desired from a particular

memory device.

identifier bytes may then be sequenced from the device

outputs by toggling address line A0 from VIL to VIH. All

other address lines must be held at VIL during auto

identify mode.

Byte 0 ( A0 = VIL) represents the manufacturer code,

and byte 1 (A0 = VIH), the device identifier code. For

the MX26C1000A, these two identifier bytes are given

in the Mode Select Table. All identifiers for the

manufacturer and device codes will possess odd parity,

with the MSB (DQ7) defined as the parity bit.

SYSTEM CONSIDERATIONS

Duringtheswitchbetweenactiveandstandbyconditions,

transient current peaks are produced on the rising and

falling edges of Chip Enable. The magnitude of these

transient current peaks is dependent on the output

capacitance loading of the device. At a minimum, a 0.1

uF ceramic capacitor (high frequency, low inherent

inductance) should be used on each device between

VCC and GND to minimize transient effects. In addition,

to overcome the voltage drop caused by the inductive

effects of the printed circuit board traces on EPROM

arrays, a4.7uFbulkelectrolyticcapacitorshouldbeused

between VCC and GND for each of the eight devices.

The location of the capacitor should be close to where

the power supply is connected to the array.

READ MODE

The MX26C1000A has two control functions, both of

which must be logically satisfied in order to obtain data

at the outputs. Chip Enable (CE) is the power control

and should be used for device selection. Output Enable

(OE) is the output control and should be used to gate

data to the output pins, independent of device selection.

Assuming that addresses are stable, address access

time (tACC) is equal to the delay from CE to output (tCE).

Data is available at the outputs tOE after the falling edge

of OE, assuming that CE has been LOW and addresses

have been stable for at least tACC - tOE.

STANDBY MODE

The MX26C1000A has a CMOS standby mode which

reducesthemaximumVCCcurrent to100uA. Itisplaced

in CMOS standby when CE is at VCC ± 0.3 V. The

MX26C1000A also has a TTL-standby mode which

reduces the maximum VCC current to 1.5 mA. It is placed

in TTL-standby when CE is at VIH. When in standby

mode, the outputs are in a high-impedance state,

independent of the OE input.

TWO-LINE OUTPUT CONTROL FUNCTION

To accommodate multiple memory connections, a two-

line control function is provided to allow for:

1. Low memory power dissipation,

2. Assurance that output bus contention will not occur.

It is recommended that CE be decoded and used as the

primary device-selecting function, while OE be made a

common connection to all devices in the array and

connected to the READ line from the system control bus.

P/N: PM0454 Patent#: US#5,526,307

REV.1.5, FEB 10, 1998

1 234 5 6 7...16

下载PDF

与MX26C1000AQC-90相关器件

型号	品牌	描述	获取价格	数据表
MX26C1000ATC-10	Macronix	1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM	获取价格
MX26C1000ATC-12	Macronix	1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM	获取价格
MX26C1000ATC-70	Macronix	1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM	获取价格
MX26C1000ATC-90	Macronix	1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM	获取价格
MX26C1000B	Macronix	1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM	获取价格
MX26C1000BMC-10	Macronix	1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM	获取价格

与MX26C1000AQC-90相关文章

STM32H743技术深度剖析与应用案例探索
2024-05-30

17
LM321中文资料解析：引脚功能介绍、技术特点、技术特性分析
2024-05-30

17
74HC14芯片资料介绍：性能特性分析、引脚介绍
2024-05-30

14
LM1875芯片手册：功放参数分析、引脚说明、电路设计要点
2024-05-30

11

产品中心

服务支持

精选活动

关于我们

帮助中心

MX26C1000AQC-90

MX26C1000AQC-90 技术参数

MX26C1000AQC-90 数据手册

与MX26C1000AQC-90相关器件

与MX26C1000AQC-90相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MX26C1000AQC-90

MX26C1000AQC-90 技术参数

MX26C1000AQC-90 数据手册

与MX26C1000AQC-90相关器件

与MX26C1000AQC-90相关文章

您还可以找

您在本页遇到什么问题？