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更新时间： 2024-01-19 20:34:25

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
2页	71K
描述
MultiLynx CL2151 Universal HFC? Interactive Cable Transceiver

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中文翻译

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MULTILYNX 数据手册

™

MultiLynx CL2151 Universal HFC

Interactive Cable Transceiver

OVERVI EW

The MultiLynx^™CL2151 is a universa l ca ble tra nsceiver solution for a dva nced

set-top boxes (STB) a nd ca ble modems complia nt with DVB/ DAVIC, a nd DO CSIS

sta nda rds. The CL2151 is built for STB a nd ca ble-modem ma nufa cturers requiring the

ma ximum performa nce with the lowest system BO M cost. Its high level of integra tion

provides ma nufa cturers with a flexible, yet quick time-to-ma rket solution for sta nda rds-

ba sed deployments a ll over the world.

The CL2151 is a complete a nd highly integra ted solution combining a

16-256 Q AM in-ba nd receiver, Q PSK/ Q AM receiver for out-of-ba nd downstrea m

reception, a Q PSK/ 16-Q AM burst tra nsmitter, a nd a proven DAVIC/ DVB a nd DO CSIS

1.0/ 1.1 media a ccess controller (MAC). The chip includes a RISC processor with a DSP

instruction set ena bling glueless interfa ce to subscriber line ICs (SLICs) a nd a PO D

interfa ce.

I NTERFACE FEATURES:

The CL2151 inba nd demodula tor is a 16-256 Q AM. A second out-of-ba nd

downstrea m cha nnel provides a n option to use a Q PSK or full 16-256 Q AM demodu-

la tion, a llowing for flexible implementa tion for DO CSIS, DVB/ DAVIC or DVS 178

without cha nging a ny externa l components. Both cha nnels a re complia nt with ITU J.83

Annex A, B, a nd C a nd integra te a 10-bit A/ D converter. The upstrea m Q PSK/ 16-Q AM

burst tra nsmitter a long with ITU J.112 Annex A, B complia nt FEC encoding provides a

robust a nd cost-effective solution for DVB/ DAVIC, a nd DO CSIS a pplica tions.

• O penCa ble^™complia nt by supporting

O O B da ta to be bypa ssed to a PO D

interfa ce for MAC processing

• PHY DES implementa tion for physica l

security complia nt to the O penCa ble

a nd DVB sta nda rds

The ha rdwa re MAC (with pa cket pa rsing, filtering, a nd decryption), a nd the

two interna l processors – a n 88 MHz mini-RISC a nd 117 MHz SPARC v8 processor,

upon which the sta nda rd specific MAC softwa re is executed – a llow for flexible

implementa tion of DVB In-Ba nd, DO CSIS, or EuroDO CSIS sta nda rds.

• Powerful SPARC v8 interna l processor

offloa ds the STB host processor from

the MAC softwa re ta sks a nd provides

a DSP ca pa bility for IP telephony

a pplica tions

Optional POD Module

Annex B FEC

• Interna l processor includes a DSP

instruction set necessary for IP

telephony applications

TS Demux

QAM

CPU

Switch

In-Band

Tuner

ADC

Demod

Bus

Interface

Unit

Annex A FEC

Annex B FEC

Annex A FEC

DVS 178 FEC

DSP

STB Host

(POD CPU

Interface)

DOCSIS

Pre-Process

Downstream

MAC

Processor

DES Dec

OOB

Tuner

QAM/

QPSK

Demod

Diplexer

• Delivers a video telephony solution

simply by a dding uLAW or a LAW

a udio codec, a SLIC chipset a nd a n

MPEG video source encoder/ decoder

CL 2151

DAVIC

OOB FEC

DAVIC

OOB

Framer

DAVIC

DVB-RC

MAC/SAR

Copy/CRC

Engine

QAM16/

QPSK

Mod

VGA

Upstream

FEC Encode

IDC

DES Enc

UART

Amp Control

DOCSIS MAC

SDRAM

Control

SLIC I/F

SPI

GPIO

SDRAM

Th e

Co m m u n ica tio n s

High-Level Block Diagram of MultiLynx™ CL2151

Co m p a n y

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