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MU9C8K64-12TDC PDF预览

MU9C8K64-12TDC

更新时间: 2024-01-29 15:23:39
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
30页 600K
描述
MU9C Routing Coprocessor (RCP) Family

MU9C8K64-12TDC 技术参数

是否Rohs认证: 不符合生命周期:Contact Manufacturer
包装说明:QFP, QFP100,.63X.87Reach Compliance Code:unknown
风险等级:5.88JESD-30 代码:R-PQFP-G100
JESD-609代码:e0内存密度:524288 bit
内存集成电路类型:CONTENT ADDRESSABLE SRAM内存宽度:64
湿度敏感等级:3端子数量:100
字数:8192 words字数代码:8000
最高工作温度:70 °C最低工作温度:
组织:8KX64封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP100,.63X.87
封装形状:RECTANGULAR封装形式:FLATPACK
电源:3.3 V认证状态:Not Qualified
最大待机电流:0.005 A子类别:SRAMs
最大压摆率:0.2 mA标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:QUADBase Number Matches:1

MU9C8K64-12TDC 数据手册

 浏览型号MU9C8K64-12TDC的Datasheet PDF文件第2页浏览型号MU9C8K64-12TDC的Datasheet PDF文件第3页浏览型号MU9C8K64-12TDC的Datasheet PDF文件第4页浏览型号MU9C8K64-12TDC的Datasheet PDF文件第5页浏览型号MU9C8K64-12TDC的Datasheet PDF文件第6页浏览型号MU9C8K64-12TDC的Datasheet PDF文件第7页 
Data Sheet  
MU9C Routing Coprocessor (RCP) Family  
APPLICATION BENEFITS  
DISTINCTIVE CHARACTERISTICS  
• 28 million IPv4 packets per second supports up to 18  
Gb Ethernet or 7 OC-48 ATM ports at wire speed  
• 4K and 8K x 64-bit words  
• 64-bit binary compares  
• Exact match on MAC addresses  
• 35 ns deterministic compare and output time  
• 32-bit Data I/O port  
• Processes DA and SA within 190 ns, supporting three ports  
of 1 Gb or 34 ports of 100 Mb Ethernet at wire  
speed  
• 16-bit Match Address Output port  
• Mixed mode L3 and L2 single search engine for two ports  
at 1 Gb or 29 ports of 100 Mb Ethernet at wire  
speed  
• Address/Control bus directly controls device operations for  
faster operation or higher throughput  
• Seven selectable mask registers  
• Synchronous operation  
• Directly addresses external RAM containing  
associated data of any width  
• Cascadable for increased depth  
• Extensive set of control states for flexibility  
• JTAG interface  
• Hardware control states directly address memory and  
registers; Instruction and Status registers for optional  
software control  
• 100-pin LQFP package; 3.3 Volt operation  
DQ31–0  
/VB  
/E  
/CS1  
COMPARAND REGISTER  
AA Bus  
PA3–0  
/CS2  
MASK REGISTERS 1–7  
ADDRESS REGISTER  
/W  
CONFIGURATION REGISTER  
/OE  
STATUS REGISTER  
/AV  
CONTROL  
AND  
ADDRESS  
DECODER  
PRIORITY  
ENCODER  
AND  
FLAG  
LOGIC  
INSTRUCTION REGISTER  
AC Bus  
DEVICE SELECT REGISTER  
/DSC  
/RESET  
4 K x 64 Word  
(MU9C4K64)  
TCLK  
TMS  
TDI  
/FI  
/FF  
/MI  
/M F  
/MM  
8 K x 64 Word  
(MU9C8K64)  
Address Database  
TDO  
/TRST  
Figure 1: Block Diagram  
MUSIC Semiconductors, the MUSIC logo, and the phrase “MUSIC Semiconductors” are  
Registered trademarks of MUSIC Semiconductors. MUSIC is a trademark of  
MUSIC Semiconductors.  
June 1 2002 Rev. 6  

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