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MTP4N50E

更新时间: 2024-09-30 22:45:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 晶体晶体管功率场效应晶体管开关脉冲局域网
页数 文件大小 规格书
8页 257K
描述
TMOS POWER FET 4.0 AMPERES 500 VOLTS RDSon = 1.5 OHMS

MTP4N50E 技术参数

生命周期:Transferred包装说明:FLANGE MOUNT, R-PSFM-T3
Reach Compliance Code:unknown风险等级:5.18
其他特性:AVALANCHE RATED雪崩能效等级(Eas):280 mJ
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:500 V最大漏极电流 (Abs) (ID):4 A
最大漏极电流 (ID):4 A最大漏源导通电阻:1.5 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJEDEC-95代码:TO-220AB
JESD-30 代码:R-PSFM-T3JESD-609代码:e0
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:FLANGE MOUNT极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):75 W最大脉冲漏极电流 (IDM):10 A
认证状态:Not Qualified子类别:FET General Purpose Power
表面贴装:NO端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子位置:SINGLE
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

MTP4N50E 数据手册

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Order this document  
by MTP4N50E/D  
SEMICONDUCTOR TECHNICAL DATA  
Motorola Preferred Device  
N–Channel Enhancement–Mode Silicon Gate  
TMOS POWER FET  
4.0 AMPERES  
500 VOLTS  
This advanced high voltage TMOS E–FET is designed to  
withstand high energy in the avalanche mode and switch efficiently.  
This new high energy device also offers a drain–to–source diode  
with fast recovery time. Designed for high voltage, high speed  
switching applications such as power supplies, PWM motor  
controls and other inductive loads, the avalanche energy capability  
is specified to eliminate the guesswork in designs where inductive  
loads are switched and offer additional safety margin against  
unexpected voltage transients.  
R
= 1.5 OHMS  
DS(on)  
Avalanche Energy Capability Specified at Elevated  
Temperature  
D
Low Stored Gate Charge for Efficient Switching  
Internal Source–to–Drain Diode Designed to Replace External  
Zener Transient Suppressor — Absorbs High Energy in the  
Avalanche Mode  
G
Source–to–Drain Diode Recovery Time Comparable to Discrete  
Fast Recovery Diode  
S
CASE 221A–06, Style 5  
TO–220AB  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Symbol  
Value  
500  
Unit  
Vdc  
Vdc  
Drain–Source Voltage  
V
DSS  
Drain–Gate Voltage (R  
GS  
= 1.0 M)  
V
DGR  
500  
Gate–Source Voltage — Continuous  
Gate–Source Voltage — Non–repetitive  
V
±20  
±40  
Vdc  
Vpk  
GS  
V
GSM  
Drain Current — Continuous  
Drain Current — Pulsed  
I
4.0  
10  
Adc  
D
I
DM  
Total Power Dissipation @ T = 25°C  
Derate above 25°C  
P
D
75  
0.6  
Watts  
W/°C  
C
Operating and Storage Temperature Range  
T , T  
55 to 150  
°C  
J
stg  
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (T < 150°C)  
J
Single Pulse Drain–to–Source Avalanche Energy — T = 25°C  
W
W
(1)  
(2)  
280  
44  
7.4  
mJ  
J
DSR  
Single Pulse Drain–to–Source Avalanche Energy — T = 100°C  
J
Repetitive Pulse Drain–to–Source Avalanche Energy  
DSR  
THERMAL CHARACTERISTICS  
Thermal Resistance — Junction to Case  
Thermal Resistance — Junction to Ambient°  
R
R
1.67  
62.5  
°C/W  
°C  
θJC  
θJA  
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds  
T
260  
L
(1) V  
DD  
= 50 V, I = 4.0 A  
D
(2) Pulse Width and frequency is limited by T (max) and thermal response  
J
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit  
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.  
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Preferred devices are Motorola recommended choices for future use and best overall value.  
REV 1  
Motorola, Inc. 1996  

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