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MTD4N20ET4 PDF预览

MTD4N20ET4

更新时间： 2024-02-07 21:02:20
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 晶体管
页数 文件大小 规格书
10页 268K
描述
Power Field-Effect Transistor, 4A I(D), 200V, 1.2ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET

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MTD4N20ET4 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：,Reach Compliance Code：unknown
风险等级：5.89配置：Single
最大漏极电流 (Abs) (ID)：4 AFET 技术：METAL-OXIDE SEMICONDUCTOR
工作模式：ENHANCEMENT MODE最高工作温度：150 °C
极性/信道类型：N-CHANNEL最大功率耗散 (Abs)：40 W
子类别：FET General Purpose Power表面贴装：YES
Base Number Matches：1

MTD4N20ET4 数据手册

 浏览型号MTD4N20ET4的Datasheet PDF文件第2页浏览型号MTD4N20ET4的Datasheet PDF文件第3页浏览型号MTD4N20ET4的Datasheet PDF文件第4页浏览型号MTD4N20ET4的Datasheet PDF文件第5页浏览型号MTD4N20ET4的Datasheet PDF文件第6页浏览型号MTD4N20ET4的Datasheet PDF文件第7页 
Order this document  
by MTD4N20E/D  
SEMICONDUCTOR TECHNICAL DATA  
Motorola Preferred Device  
TMOS POWER FET  
4.0 AMPERES  
200 VOLTS  
N–Channel Enhancement–Mode Silicon Gate  
This advanced TMOS E–FET is designed to withstand high  
energy in the avalanche and commutation modes. The new energy  
efficient design also offers a drain–to–source diode with a fast  
recovery time. Designed for low voltage, high speed switching  
applications in power supplies, converters and PWM motor  
controls, these devices are particularly well suited for bridge circuits  
where diode speed and commutating safe operating areas are  
critical and offer additional safety margin against unexpected  
voltage transients.  
R
= 1.2 OHM  
DS(on)  
D
CASE 369A–13, Style 2  
DPAK  
•
•
Avalanche Energy Specified  
Source–to–Drain Diode Recovery Time Comparable to a  
Discrete Fast Recovery Diode  
G
•
•
•
Diode is Characterized for Use in Bridge Circuits  
I
and V Specified at Elevated Temperature  
DSS  
DS(on)  
Surface Mount Package Available in 16 mm, 13–inch/2500  
Unit Tape & Reel, Add –T4 Suffix to Part Number  
S
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Symbol  
Value  
Unit  
Drain–Source Voltage  
V
200  
Vdc  
Vdc  
DSS  
Drain–Gate Voltage (R  
GS  
= 1.0 MΩ)  
V
DGR  
200  
Gate–Source Voltage — Continuous  
— Non–repetitive (t ≤ 10 ms)  
V
± 20  
± 40  
Vdc  
Vpk  
GS  
V
GSM  
p
Drain Current — Continuous  
Drain Current — Continuous @ 100°C  
Drain Current — Single Pulse (t ≤ 10 µs)  
I
I
4.0  
2.6  
12  
Adc  
Apk  
D
D
I
p
DM  
Total Power Dissipation @ T = 25°C  
Derate above 25°C  
P
D
40  
0.32  
1.75  
Watts  
W/°C  
Watts  
C
Total Power Dissipation @ T = 25°C, when mounted to minimum recommended pad size  
A
Operating and Storage Temperature Range  
T , T  
stg  
–55 to 150  
80  
°C  
J
Single Pulse Drain–to–Source Avalanche Energy — Starting T = 25°C  
E
AS  
mJ  
J
(V  
DD  
= 80 Vdc, V = 10 Vdc, I = 4.0 Apk, L = 10 mH, R = 25 Ω)  
GS L G  
Thermal Resistance — Junction to Case  
Thermal Resistance — Junction to Ambient  
Thermal Resistance — Junction to Ambient, when mounted to minimum recommended pad size  
R
θJC  
R
θJA  
R
θJA  
3.13  
100  
71.4  
°C/W  
Maximum Temperature for Soldering Purposes, 1/8″ from case for 10 seconds  
T
L
260  
°C  
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit  
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.  
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Thermal Clad is a trademark of the Bergquist Company.  
Preferred devices are Motorola recommended choices for future use and best overall value.  
REV 1  
Motorola, Inc. 1995  
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