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MSM7617-001GS-BK PDF预览

MSM7617-001GS-BK

更新时间: 2024-01-26 09:55:09
品牌 Logo 应用领域
冲电气 - OKI 电信综合业务数字网电信集成电路
页数 文件大小 规格书
30页 367K
描述
ISDN Echo Canceller, 1-Func, CMOS, PQFP64, 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64

MSM7617-001GS-BK 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:QFP, QFP64,.66SQ,32针数:64
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.28JESD-30 代码:S-PQFP-G64
长度:14 mm功能数量:1
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP64,.66SQ,32
封装形状:SQUARE封装形式:FLATPACK
电源:5 V认证状态:Not Qualified
座面最大高度:2.4 mm子类别:Other Telecom ICs
最大压摆率:0.13 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
电信集成电路类型:ISDN ECHO CANCELLER温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD宽度:14 mm
Base Number Matches:1

MSM7617-001GS-BK 数据手册

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OKI Semiconductor  
MSM7617  
PIN DESCRIPTIONS  
Pin  
Symbol Type  
Description  
Reset signal input pin for channel 2.  
“L”: Reset  
1
RST2  
I
“H”: Normal operation  
Input signals are invalid for 100 µs after reset (after RST returns to “H” from “L”) for  
setting initial values.  
Input the basic clock during reset. Output pins will be placed in the following states  
during reset.  
Hi-Z: ROUT2, SOUT2  
No effect: SYNCO, SCKO, ROUT1, SOUT1, DF1, WDT1  
Previous state: DF2, WDT2  
At power-up, keep this pin to "L" longer than 1 µs after a master clock (CLKIN) gets  
stably supplied, and execute initialization of LSI internal registers by releasing it to  
"H".  
Also such as in a case when this LSI is intended to be kept in reset state, for  
instance, till the first call comes in, the above-mentioned initialization of LSI internal  
registers must be done, and, later than 560ns since the initialization, assert this pin  
back to "L" and wait the call.  
2
3
ADP2  
HCL2  
I
I
AFF coefficient control pin for channel 2.  
This pin stops coefficient variation of the adaptive FIR filter (AFF), fixing the  
coefficients. It allows once acquired AFF coefficients to be saved.  
“H”: Fixed coefficient mode  
“L”: Normal mode (variable coefficients)  
Echo canceler disable pin for channel 2.  
This pin disables the echo canceler and enables data from SIN to SOUT to be  
output in “through mode”. The input and output levels of SIN and SOUT are  
changed by the setting of the SG and SA pins; therefore, to output data from SIN to  
SOUT in “through mode”, set the SA and SG pins to “0 dB”.  
It simultaneously clears the adaptive FIR filter coefficients.  
“H”: Disable mode  
“L”: Normal mode (echo canceller enabled)  
4
6
SYNC2  
NLP2  
I
I
Sync signal input pin for channel 2 transmit/receive PCM data while in parallel I/O  
mode.  
Input the transmit/receive sync signal (8 kHz) of the PCM CODEC connected to  
channel 2. Input “L” if not in parallel I/O mode.  
NLP control pin for channel 2.  
This pin controls center clipping, forcing SOUT2 output to the minimum positive  
value when it is below –54 dBm0. It is effective for reducing uncanceled echoes  
and low-level noise.  
“H”: Center clipping on  
“L”: Center clipping off  
5

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