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MSM5412222 PDF预览

MSM5412222

更新时间: 2024-02-28 12:59:18
品牌 Logo 应用领域
冲电气 - OKI 存储
页数 文件大小 规格书
15页 170K
描述
262,214-Word x 12-Bit Field Memory

MSM5412222 数据手册

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E2L0034-17-Y1  
Preliminary  
This version: Jan. 1998  
Previous version: Dec. 1996  
¡ Semiconductor  
MSM5412222  
262,214-Word ¥ 12-Bit Field Memory  
DESCRIPTION  
The OKI MSM5412222 is a high performance 3-Mbit, 256K ¥12-bit, Field Memory. It is especially  
designed for high-speed serial access applications such as HDTVs, conventional NTSC TVs,  
VTRs, digital movies and Multi-media systems. MSM5412222 is a FRAM for wide or low end use  
in general commodity TVs and VTRs exclusively. MSM5412222 is not designed for high end use  
in medical systems, professional graphics systems which require long term picture storage, data  
storage systems and others. Two or more MSM5412222s can be cascaded directly without any  
delay devices between them. (Cascading provides larger storage depth or a longer delay).  
Each of the 12-bit planes has separate serial write and read ports. These employ independent  
control clocks to support asynchronous read and write operations. Different clock rates are also  
supported, which allow alternate data rates between write and read data streams.  
The MSM5412222 provides high speed FIFO, First-In First-Out, operation without external  
refreshing: MSM5412222 refreshes its DRAM storage cells automatically, so that it appears fully  
static to the users.  
Moreover, fully static type memory cells and decoders for serial access enable the refresh free  
serial access operation, so that serial read and/or write control clock can be halted high or low  
for any duration as long as the power is on. Internal conflicts of memory access and refreshing  
operations are prevented by special arbitration logic.  
The MSM5412222’s function is simple, and similar to a digital delay device whose delay-bit-  
length is easily set by reset timing. The delay length, and the number of read delay clocks  
between write and read, is determined by externally controlled write and read reset timings.  
Additional SRAM serial registers, or line buffers for the initial access of 256 ¥ 12-bit enable high  
speed first-bit-access with no clock delay just after the write or read reset timings.  
Additionally, theMSM5412222hasawritemaskfunctionorinputenablefunction(IE), andread-  
data skipping function or output enable function (OE). The differences between write enable  
(WE) and input enable (IE), and between read enable (RE) and output enable (OE) are that WE  
and RE can stop serial write/read address increments, but IE and OE cannot stop the increment,  
when write/read clocking is continuously applied to MSM5412222. The input enable (IE)  
function allows the user to write into selected locations of the memory only, leaving the rest of  
thememorycontentsunchanged. Thisfacilitatesdataprocessingtodisplayapictureinpicture”  
on a TV screen.  
The MSM5412222 is similar in operation and functionality to OKI 1-Mbit Field Memory  
MSM514222Band2-MbitFieldMemoryMSM518222. ThreeMSM514222BsoroneMSM514222B  
plus one MSM518222 can be replaced simply by one MSM5412222.  
1/15  

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