Datasheet > MPQ6541A-AEC1

MPQ6541A-AEC1

更新时间： 2024-04-09 19:00:25

品牌	Logo	应用领域
芯源 - MPS		/
页数	文件大小	规格书
20页	635K
描述
支持 HS 和 LS 输入的 40V、8A、三相功率级，符合 AEC-Q100 认证

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数据手册

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MPQ6541A-AEC1 数据手册

MPQ6541-AEC1, MPQ6541A-AEC1 – 40V, 8A, 3-PHASE POWER STAGE, AEC-Q100

PIN FUNCTIONS

MPQ6541-AEC1 MPQ6541A-AEC1

Pin #

Description

Pin Name

Fault indication. nFAULT has an open-drain output that pulls

to logic low under fault conditions.

nFAULT

nSLEEP

Sleep mode input. Pull nSLEEP to logic low to enter low-

power sleep mode; pull nSLEEP to logic high for normal

operation. nSLEEP has an internal pull-down resistor.

ENA

LSA

Enable pin for phase A.

Enables the low-side MOSFET (LS-FET) for phase A.

Enable pin for phase B.

ENB

LSB

Enables the LS-FET for phase B.

Enable pin for phase C.

ENC

LSC

Enables the LS-FET for phase C.

PWM input for phase A.

PWMA

HSA

Enables the high-side MOSFET (HS-FET) for phase A.

PWM input for phase B.

PWMB

HSB

Enables the HS-FET for phase B.

PWM input for phase C.

PWMC

HSC

Enables the HS-FET for phase C.

Phase A output.

9, 26

Low-side source connection for phases A, B, and C. These

pins must be connected directly to GND.

10, 12

LSS

11, 24

13, 22

Phase B output.

Phase C output.

Low-side gate drive output. Connect a 4.7μF, 10V ceramic

capacitor with X7R dielectrics from VG to ground.

SOA

SOB

SOC

GND

Current-sense output for phase A.

Current-sense output for phase B.

Current-sense output for phase C.

Ground.

Charge pump output. Connect a 1μF, 16V ceramic capacitor

with X7R dielectrics from VCP to VIN.

VCP

CP1

CP2

VIN

Charge pump capacitor pins. Connect a 100nF ceramic

capacitor with X7R dielectrics rated for V_IN(at minimum) from

CP1 to CP2.

23, 25

Input supply voltage.

MPQ6541-AEC1, MPQ6541A-AEC1 Rev. 1.11

MonolithicPower.com

5/23/2023

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

1 2 3 456 7 8...20

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