Datasheet > MPC5602DXLL

MPC5602DXLL

更新时间： 2024-01-21 09:43:07

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		闪存控制器
页数	文件大小	规格书
77页	675K
描述
Up to 256 KB on-chip Code Flash supported with Flash controller and ECC

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MPC5602DXLL 技术参数

生命周期：	Transferred	零件包装代码：	QFP
包装说明：	LFQFP,	针数：	100
Reach Compliance Code：	unknown	HTS代码：	8542.31.00.01
风险等级：	5.64	具有ADC：	YES
其他特性：	ALSO OPERATES AT 3 V MINIMUM SUPPLY	地址总线宽度：
位大小：	32	最大时钟频率：	16 MHz
DAC 通道：	NO	DMA 通道：	YES
外部数据总线宽度：		JESD-30 代码：	S-PQFP-G100
长度：	14 mm	I/O 线路数量：	79
端子数量：	100	最高工作温度：	105 °C
最低工作温度：	-40 °C	PWM 通道：	YES
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
认证状态：	Not Qualified	ROM可编程性：	FLASH
座面最大高度：	1.7 mm	速度：	48 MHz
最大供电电压：	5.5 V	最小供电电压：	4.5 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	14 mm
uPs/uCs/外围集成电路类型：	MICROCONTROLLER	Base Number Matches：	1

MPC5602DXLL 数据手册

Introduction

1.1

Document overview

This document describes the device features and highlights the important electrical and physical characteristics.

1.2

Description

These 32-bit automotive microcontrollers are a family of system-on-chip (SoC) devices designed to be central to the

development of the next wave of central vehicle body controller, smart junction box, front module, peripheral body, door control

and seat control applications.

This family is one of a series of next-generation integrated automotive microcontrollers based on the Power Architecture

technology and designed specifically for embedded applications.

The advanced and cost-efficient e200z0 host processor core of this automotive controller family complies with the Power

Architecture technology and only implements the VLE (variable-length encoding) APU (auxiliary processing unit), providing

improved code density. It operates at speeds of up to 48 MHz and offers high performance processing optimized for low power

consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported

with software drivers, operating systems and configuration code to assist with the user’s implementations.

The device platform has a single level of memory hierarchy and can support a wide range of on-chip static random access

memory (SRAM) and internal flash memory.

Table 1. MPC5602D device comparison

Device

Feature

MPC5601DxLH

MPC5601DxLL

MPC5602DxLH

e200z0

MPC5602DxLL

CPU

Execution speed

Code Flash

Data Flash

SRAM

Static – up to 48 MHz

64 KB (4 × 16 KB)

16 ch

128 KB

12 KB

256 KB

16 KB

eDMA

ADC

16 ch, 12-bit

13 ch, 16-bit

33 ch, 12-bit

16 ch, 12-bit

33 ch, 12-bit

28 ch, 16-bit

CTU

16 ch

Total timer I/O¹

eMIOS

28 ch, 16-bit

13 ch, 16-bit

• Type X²

• Type Y³

2 ch

—

5 ch

9 ch

7 ch

2 ch

—

5 ch

9 ch

7 ch

• Type G⁴

• Type H⁵

SCI (LINFlex)

SPI (DSPI)

CAN (FlexCAN)

GPIO⁶

7 ch

4 ch

7 ch

4 ch

MPC5602D Microcontroller Data Sheet, Rev. 3.1

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

1 234 5 6 7...77

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与MPC5602DXLL相关器件

型号	品牌	描述	获取价格	数据表
MPC5602F0MLH4	NXP	32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP64, 10 X 10 MM, 1.40 MM, 0.50 MM PITCH, R	获取价格
MPC5602F0MLH4R	NXP	32-BIT, FLASH, 64MHz, RISC MICROCONTROLLER, PQFP64	获取价格
MPC5602F0MLH6	NXP	32-BIT, FLASH, 64MHz, RISC MICROCONTROLLER, PQFP64	获取价格
MPC5602F0MLH6R	NXP	32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP64, 10 X 10 MM, 1.40 MM, 0.50 MM PITCH, R	获取价格
MPC5602F0VLH4	NXP	32-BIT, FLASH, 64MHz, RISC MICROCONTROLLER, PQFP64	获取价格
MPC5602F0VLH4R	NXP	32-BIT, FLASH, 64MHz, RISC MICROCONTROLLER, PQFP64	获取价格

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