MP2759 – 36V SWITCHING CHARGER FOR 1-CELL TO 6-CELL BATTERIES
PIN FUNCTIONS
Pin #
Name
Type Description
Power input. Connect a 1μF capacitor from IN to PGND. See Application Section
for capacitor and voltage clamping recommendation.
1
IN
Power
Power
Decoupling capacitor of the power stage. Bypass PMID with a 2.2µF ceramic
capacitor from PMID to PGND. Place the capacitor as close to the IC as possible
with the shortest route for both the PMID and PGND current path. A 2A/40V
Schottky diode must be placed between the IN pin and PMID pin.
2
PMID
3
4
SW
Power Switching node. Connect SW to the inductor.
Bootstrap pin. Connect a 100nF bootstrap capacitor between the BST and SW
Power pins to form a floating supply to drive the high-side MOSFET (HS-FET) above the
supply voltage.
BST
5, 6, 7 PGND Power Power ground.
--------------
Status indication. This pin indicates the charging operation status and fault status
with an open-drain output (see Table 3 on page 15).
8
9
O
O
STAT
----------------
Input voltage valid indication. This pin is an open-drain output, active low.
ACOK
10
11
CELL
VB
I
I
Battery cell number selection.
Battery regulation voltage setting.
Temperature-sense input. Connect the NTC pin to a negative temperature
coefficient (NTC) thermistor. A JEITA profile is supported with configurable
thresholds.
12
13
14
NTC
ILIM
I
I
I
I
Input current limit setting pin. Connect a resistor from ILIM to AGND.
Battery positive sensing pin. Place a minimum 10μF capacitor from BATT to
PGND. See Application Section for capacitor and voltage clamping
recommendation.
BATT
15
16
CSP
Battery current-sense positive input.
AGND Power Analog ground.
Internal circuit power supply. Bypass VCC to AGND with a 1µF ceramic
capacitor.
17
18
19
VCC
ISET
VLIM
I
I
I
Charging current setting pin. Connect a resistor from ISET to AGND.
Input voltage limit setting pin. Connect to a resistor divider from VLIM to IN and
AGND. This pin can be pulled low to disable charging.
MP2759 Rev. 1.0
11/30/2020
MonolithicPower.com
4
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