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MMDP-67206E-15 PDF预览

MMDP-67206E-15

更新时间： 2023-01-02 17:34:00
品牌 Logo 应用领域
TEMIC 先进先出芯片光电二极管
页数 文件大小 规格书
16页 105K
描述
FIFO, 16KX9, 15ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN

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中文翻译

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MMDP-67206E-15 技术参数

生命周期：Transferred包装说明：400 MIL, FLAT PACK, 28 PIN
Reach Compliance Code：unknown风险等级：5.7
Is Samacsys：N最长访问时间：15 ns
周期时间：25 nsJESD-30 代码：R-PDFP-F28
内存密度：147456 bit内存宽度：9
功能数量：1端子数量：28
字数：16384 words字数代码：16000
工作模式：ASYNCHRONOUS最高工作温度：125 °C
最低工作温度：-55 °C组织：16KX9
可输出：NO封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：FLATPACK
并行/串行：PARALLEL认证状态：Not Qualified
筛选级别：MIL-PRF-38535 Class Q最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子形式：FLAT
端子位置：DUALBase Number Matches：1

MMDP-67206E-15 数据手册

 浏览型号MMDP-67206E-15的Datasheet PDF文件第2页浏览型号MMDP-67206E-15的Datasheet PDF文件第3页浏览型号MMDP-67206E-15的Datasheet PDF文件第4页浏览型号MMDP-67206E-15的Datasheet PDF文件第5页浏览型号MMDP-67206E-15的Datasheet PDF文件第6页浏览型号MMDP-67206E-15的Datasheet PDF文件第7页 
M67206E  
16 K ꢀ 9 High Speed CMOS Parallel FIFO Rad Tolerant  
Introduction  
The M67206E implements a first-in first-out algorithm, Using an array of eight transistors (8 T) memory cell, the  
featuring asynchronous read/write operations. The FULL M67206E combine an extremely low standby supply  
and EMPTY flags prevent data overflow and underflow. current (typ = 0.1 µA) with a fast access time at 15 ns  
The Expansion logic allows unlimited expansion in word over the full temperature range. All versions offer battery  
size and depth with no timing penalties. Twin address backup data retention capability with a typical power  
pointers automatically generate internal read and write consumption at less than 2 µW.  
addresses, and no external address information are  
The M67206E is processed according to the methods of  
required for the TEMIC FIFOs. Address pointers are  
the latest revision of the MIL STD 883 (class B or S), ESA  
automatically incremented with the write pin and read  
SCC 9000 or QML.  
pin. The 9 bits wide data are used in data communications  
applications where a parity bit for error checking is  
necessary. The Retransmit pin reset the Read pointer to  
zero without affecting the write pointer. This is very  
useful for retransmitting data when an error is detected in  
the system.  
Features  
D First-in first-out dual port memory  
D 16384 × 9 organisation  
D Fully expandable by word width or depth  
D Asynchronous read/write operations  
D Empty, full and half flags in single device mode  
D Retransmit capability  
D Fast Flag and access times: 15, 30 ns  
D Wide temperature range : – 55 °C to + 125 °C  
D Bi-directional applications  
D Battery back-up operation : 2 V data retention  
D TTL compatible  
D Single 5 V ± 10 % power supply  
D High Performance SCMOS Technology  
1
Rev. C – June 30, 1999  
1234567...16

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与MMDP-67206E-15相关器件

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MMDP-67206E-15/883 TEMIC

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 		FIFO, 16KX9, 15ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206E-15MQ TEMIC

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 		FIFO, 16KX9, 15ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206E-30SB/SC TEMIC

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 		FIFO, 16KX9, 30ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206EV-15 TEMIC

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 		FIFO, 16KX9, 15ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206EV-15/883 TEMIC

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 		FIFO, 16KX9, 15ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206EV-15MQ TEMIC

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 		FIFO, 16KX9, 15ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206EV-30 TEMIC

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 		FIFO, 16KX9, 30ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206EV-30/883 TEMIC

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 		FIFO, 16KX9, 30ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206EV-30SB/SC TEMIC

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 		FIFO, 16KX9, 30ns, Asynchronous, CMOS, PDFP28, 400 MIL, FLAT PACK, 28 PIN
MMDP-67206FV-15 TEMIC

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 		FIFO, 16KX9, 15ns, Asynchronous, CMOS, CDFP28, 0.400 INCH, FP-28

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