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MM74HCT541MTC PDF预览

MM74HCT541MTC

更新时间： 2024-01-13 04:49:34
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 307K
描述
八路 3 态缓冲器

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MM74HCT541MTC 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：TSSOP, TSSOP20,.25
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：20 weeks
风险等级：0.73系列：HCT
JESD-30 代码：R-PDSO-G20JESD-609代码：e4
长度：6.5 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.006 A
湿度敏感等级：1位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP20,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
最大电源电流（ICC）：1.5 mAProp。Delay @ Nom-Sup：29 ns
传播延迟（tpd）：42 ns认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm

MM74HCT541MTC 数据手册

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DATA SHEET  
www.onsemi.com  
Octal 3-State Buffer,  
Inverting/Non-Inverting  
SOIC−20 WB  
CASE 751D−05  
TSSOP−20 WB  
CASE 948E  
TSSOP−20  
CASE 948AQ  
MM74HCT540,  
MM74HCT541  
MARKING DIAGRAMS  
General Description  
20  
1
20  
The MM74HCT540 and MM74HCT541 3−STATE buffers utilize  
advanced silicon−gate CMOS technology and are general purpose  
high speed inverting and non−inverting buffers. They possess high  
drive current outputs which enable high speed operation even when  
driving large bus capacitances. These circuits achieve speeds  
comparable to low power Schottky devices, while retaining the low  
power consumption of CMOS. Both devices are TTL input compatible  
and have a fanout of 15 LS−TTL equivalent inputs.  
MM74HCT devices are intended to interface between TTL and  
NMOS components and standard CMOS devices. These parts are also  
plug−in replacements for LS−TTL devices and can be used to reduce  
power consumption in existing designs.  
XXX  
XXXXXX  
AWLYYWWG  
XXX  
ALYWG  
G
1
XXXXX = Specific Device Code  
A
L/WL  
YY  
= Assembly Location  
= Wafer Lot  
= Year  
YW/WW = Work Week  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
The MM74HCT540 is an inverting buffer and the MM74HCT541 is  
a non−inverting buffer. The 3−STATE control gate operates as a  
two−input NOR such that if either G1 or G2 are HIGH, all eight  
outputs are in the high−impedance state.  
CONNECTION DIAGRAMS  
Pin Assignment for SOIC and TSSOP  
In order to enhance PC board layout, the MM74HCT540 and  
MM74HCT541 offers a pinout having inputs and outputs on opposite  
sides of the package. All inputs are protected from damage due to  
static discharge by diodes to V and ground.  
CC  
Features  
• TTL Input Compatible  
• Typical Propagation Delay: 12 ns  
• 3−STATE Outputs for Connection to System Buses  
• Low Quiescent Current: 160 ꢀ A  
• Output Current: 6 mA (min)  
• These are Pb−Free Devices  
MM74HCT540 (Top View)  
MM74HCT541 (Top View)  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 1984  
1
Publication Order Number:  
December, 2022 − Rev. 2  
MM74HCT541/D  
1234567...9

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