MM74HC259

更新时间： 2024-09-30 23:02:43

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
7页	79K
描述
8-Bit Addressable Latch/3-to-8 Line Decoder

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中文翻译

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数据手册

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MM74HC259 数据手册

September 1983

Revised February 1999

MM74HC259

8-Bit Addressable Latch/3-to-8 Line Decoder

inputs. To eliminate the possibility of entering erroneous

data into the latches, the enable should be held HIGH

(inactive) while the address lines are changing.

General Description

The MM74HC259 device utilizes advanced silicon-gate

CMOS technology to implement an 8-bit addressable latch,

designed for general purpose storage applications in digital

systems.

If enable is held HIGH and CLEAR is taken LOW all eight

latches are cleared to a LOW state. If enable is LOW all

latches except the addressed latch will be cleared. The

addressed latch will instead follow the D input, effectively

implementing a 3-to-8 line decoder.

The MM74HC259 has a single data input (D), 8 latch out-

puts (Q1–Q8), 3 address inputs (A, B, and C), a common

enable input (G), and a common CLEAR input. To operate

this device as an addressable latch, data is held on the D

input, and the address of the latch into which the data is to

be entered is held on the A, B, and C inputs. When

ENABLE is taken LOW the data flows through to the

addressed output. The data is stored when ENABLE transi-

tions from LOW-to-HIGH. All unaddressed latches will

remain unaffected. With enable in the HIGH state the

device is deselected, and all latches remain in their previ-

ous state, unaffected by changes on the data or address

All inputs are protected from damage due to static dis-

charge by diodes to V_CCand ground.

Features

■ Typical propagation delay: 18 ns

■ Wide supply range: 2–6V

■ Low input current: 1 µA maximum

■ Low quiescent current: 80 µA maximum (74HC Series)

Ordering Code:

Order Number

MM74HC259M

MM74HC259SJ

MM74HC259MTC

MM74HC259N

Package Number Package Description

M16A

M16D

MTC16

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Latch Selection Table

Pin Assignments for DIP, SOIC, SOP and TSSOP

Select Inputs

Latch

Addressed

H = HIGH level, L = LOW level

D = the level at the data input

the level of Q (i = 0, 1...7, as appropriate)

Top View

before the indicated steady-state input

conditions were established.

DS005006.prf

www.fairchildsemi.com

12 3 4 5 6 7

中文翻译

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与MM74HC259相关器件

型号	品牌	获取价格	描述	数据表
MM74HC259J	NSC	获取价格	IC HC/UH SERIES, OCTAL LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16,
MM74HC259M	ROCHESTER	获取价格	D Latch, HC/UH Series, 1-Func, Low Level Triggered, 1-Bit, True Output, CMOS, PDSO16, 0.15
MM74HC259M	FAIRCHILD	获取价格	8-Bit Addressable Latch/3-to-8 Line Decoder
MM74HC259M/A+	NSC	获取价格	IC,LATCH,SINGLE,8-BIT,HC-CMOS,SOP,16PIN,PLASTIC
MM74HC259M_NL	FAIRCHILD	获取价格	D Latch, HC/UH Series, 1-Func, Low Level Triggered, 1-Bit, True Output, CMOS, PDSO16, 0.15
MM74HC259MTC	FAIRCHILD	获取价格	8-Bit Addressable Latch/3-to-8 Line Decoder
MM74HC259MTCX	FAIRCHILD	获取价格	D Latch, HC/UH Series, 1-Func, Low Level Triggered, 1-Bit, True Output, CMOS, PDSO16, 4.40
MM74HC259MTCX	ROCHESTER	获取价格	D Latch, HC/UH Series, 1-Func, Low Level Triggered, 1-Bit, True Output, CMOS, PDSO16, 4.40
MM74HC259MX	ROCHESTER	获取价格	D Latch, HC/UH Series, 1-Func, Low Level Triggered, 1-Bit, True Output, CMOS, PDSO16, 0.15
MM74HC259MX	TI	获取价格	HC/UH SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO16, PLASTIC, SO-16

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