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MM74C89 PDF预览

MM74C89

更新时间: 2024-02-01 10:24:25
品牌 Logo 应用领域
美国国家半导体 - NSC 存储
页数 文件大小 规格书
6页 132K
描述
64-Bit TRI-STATE Random Access Read/Write Memory

MM74C89 数据手册

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March 1988  
MM54C89/MM74C89 64-Bit TRI-STATE  
Random Access Read/Write Memory  
É
General Description  
The MM54C89/MM74C89 is a 16-word by 4-bit random ac-  
cess read/write memory. Inputs to the memory consist of  
four address lines, four data input lines, a write enable line  
and a memory enable line. The four binary address inputs  
are decoded internally to select each of the 16 possible  
word locations. An internal address register latches the ad-  
dress information on the positive to negative transition of  
the memory enable input. The four TRI-STATE data output  
lines working in conjunction with the memory enable input  
provide for easy memory expansion.  
Read Operation: The complement of the information which  
was written into the memory is non-destructively read out at  
the four outputs. This is accomplished by selecting the de-  
sired address and bringing memory enable low and write  
enable high.  
When the device is writing or disabled the output assumes a  
TRI-STATE (Hi-z) condition.  
Features  
Y
Wide supply voltage range  
Guaranteed noise margin  
High noise immunity  
Low power  
3.0V to 15V  
1.0V  
Address Operation: Address inputs must be stable t pri-  
SA  
or to the positive to negative transition of memory enable. It  
is thus not necessary to hold address information stable for  
Y
Y
Y
0.45 V  
CC  
(typ.)  
fan out of 2  
driving 74L  
more than t after the memory is enabled (positive to neg-  
HA  
ative transition of memory enable).  
TTL compatibility  
Y
Y
Y
Low power consumption  
Fast access time  
100 nW/package (typ.)  
e
Note: The timing is different than the DM7489 in that a positive to negative  
transition of the memory enable must occur for the memory to be  
selected.  
130 ns (typ.) at V  
10V  
CC  
TRI-STATE output  
Write Operation: Information present at the data inputs is  
written into the memory at the selected address by bringing  
write enable and memory enable low.  
Logic and Connection Diagrams  
Dual-In-Line Package  
TL/F/5888–2  
Top View  
Order Number MM54C89  
or MM74C89  
TL/F/5888–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/5888  
RRD-B30M105/Printed in U. S. A.  

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