5秒后页面跳转
MM74C901M PDF预览

MM74C901M

更新时间: 2024-09-29 22:15:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 72K
描述
Hex Inverting TTL Buffer . Hex Non-Inverting TTL Buffer

MM74C901M 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.54
系列:CMOSJESD-30 代码:R-PDSO-G14
JESD-609代码:e0长度:8.65 mm
逻辑集成电路类型:INVERTER最大I(ol):0.0026 A
功能数量:6输入次数:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
Prop。Delay @ Nom-Sup:70 ns传播延迟(tpd):35 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.75 mm子类别:Gates
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

MM74C901M 数据手册

 浏览型号MM74C901M的Datasheet PDF文件第2页浏览型号MM74C901M的Datasheet PDF文件第3页浏览型号MM74C901M的Datasheet PDF文件第4页浏览型号MM74C901M的Datasheet PDF文件第5页浏览型号MM74C901M的Datasheet PDF文件第6页 
October 1987  
Revised January 1999  
MM74C901 • MM74C902  
Hex Inverting TTL Buffer •  
Hex Non-Inverting TTL Buffer  
General Description  
Features  
Wide supply voltage range: 3.0V to 15V  
The MM74C901 and MM74C902 hex buffers employ com-  
plementary MOS to achieve wide supply operating range,  
low power consumption, and high noise immunity. These  
buffers provide direct interface from PMOS into CMOS or  
TTL and direct interface from CMOS to TTL or CMOS  
operating at a reduced VCC supply.  
Guaranteed noise margin: 1.0V  
High noise immunity: 0.45 VCC (typ.)  
TTL compatibility: Fan out of 2 driving standard TTL  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74C901M  
MM74C901N  
MM74C902M  
MM74C902N  
M14A  
N14A  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.300” Wide  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
Pin Assignments for DIP and SOIC  
MM74C901  
MM74C902  
Top View  
Top View  
Logic Diagrams  
MM74C901  
MM74C902  
CMOS to TTL Inverting Buffer  
CMOS to TTL Buffer  
© 1999 Fairchild Semiconductor Corporation  
DS005909.prf  
www.fairchildsemi.com  

与MM74C901M相关器件

型号 品牌 获取价格 描述 数据表
MM74C901M/A+ NSC

获取价格

IC,LOGIC GATE,HEX INVERTER,CMOS,SOP,14PIN,PLASTIC
MM74C901MX FAIRCHILD

获取价格

暂无描述
MM74C901N FAIRCHILD

获取价格

Hex Inverting TTL Buffer . Hex Non-Inverting TTL Buffer
MM74C901N NSC

获取价格

IC CMOS SERIES, HEX 1-INPUT INVERT GATE, PDIP14, PLASTIC, DIP-14, Gate
MM74C901N/A+ NSC

获取价格

IC,LOGIC GATE,HEX INVERTER,CMOS,DIP,14PIN,PLASTIC
MM74C901N/B+ TI

获取价格

IC,LOGIC GATE,HEX INVERTER,CMOS,DIP,14PIN,PLASTIC
MM74C902 NSC

获取价格

Hex Inverting TTL, Non-Inverting TTL, Inverting CMOS, Non-Inverting CMOS Buffer
MM74C902J NSC

获取价格

IC CMOS SERIES, HEX 1-INPUT NON-INVERT GATE, CDIP14, CERAMIC, DIP-14, Gate
MM74C902J ROCHESTER

获取价格

Buffer, CMOS Series, 6-Func, 1-Input, CMOS, CDIP14, CERAMIC, DIP-14
MM74C902J/A+ TI

获取价格

IC,LOGIC GATE,HEX BUFFER,CMOS,DIP,14PIN,CERAMIC