MM54C74N

更新时间： 2024-01-07 07:42:24

品牌	Logo	应用领域
美国国家半导体 - NSC		触发器
页数	文件大小	规格书
6页	123K
描述
Dual D Flip-Flop

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中文翻译

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数据手册

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MM54C74N 数据手册

February 1988

MM54C74/MM74C74 Dual D Flip-Flop

General Description

Low power

50 nW (typ.)

10 MHz (typ.)

with 10V supply

The MM54C74/MM74C74 dual D flip-flop is a monolithic

complementary MOS (CMOS) integrated circuit constructed

with N- and P-channel enhancement transistors. Each flip-

flop has independent data, preset, clear and clock inputs

and Q and Q outputs. The logic level present at the data

input is transferred to the output during the positive going

transition of the clock pulse. Preset or clear is independent

of the clock and accomplished by a low level at the preset

or clear input.

Medium speed operation

Applications

Automotive

Data terminals

Instrumentation

Medical electronics

Alarm system

Features

Industrial electronics

Supply voltage range

3V to 15V

Drive 2 LPT L loads

Remote metering

Tenth power TTL compatible

High noise immunity

Computers

0.45 V

(typ.)

Logic Diagram

TL/F/5885–1

Truth Table

Connection Diagram

Dual-In-Line Package

Preset

Clear

*No change in output from previous state.

Order Number MM54C74 or MM74C74

TL/F/5885–2

Top View

Note: A logic ‘‘0’’ on clear sets Q to logic ‘‘0’’.

A logic ‘‘0’’ on preset sets Q to logic ‘‘1’’.

1995 National Semiconductor Corporation

TL/F/5885

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6

中文翻译

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MM54C83D/883C	NSC	获取价格	IC,BINARY ADDER,CMOS,DIP,16PIN,CERAMIC