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MM54C86 PDF预览

MM54C86

更新时间: 2024-09-27 22:46:11
品牌 Logo 应用领域
美国国家半导体 - NSC
页数 文件大小 规格书
4页 104K
描述
Quad 2-Input EXCLUSIVE-OR Gate

MM54C86 数据手册

 浏览型号MM54C86的Datasheet PDF文件第2页浏览型号MM54C86的Datasheet PDF文件第3页浏览型号MM54C86的Datasheet PDF文件第4页 
February 1988  
MM54C86/MM74C86 Quad 2-Input EXCLUSIVE-OR Gate  
General Description  
Features  
Y
Wide supply voltage range  
3.0V to 15V  
1.0V  
Employing complementary MOS (CMOS) transistors to  
achieve wide power supply operating range, low power con-  
sumption and high noise margin these gates provide basic  
functions used in the implementation of digital integrated  
circuit systems. The N- and P-channel enhancement mode  
transistors provide a symmetrical circuit with output swing  
essentially equal to the supply voltage. No DC power other  
than that caused by leakage current is consumed during  
static condition. All inputs are protected from damage due  
Y
Guaranteed noise margin  
Y
High noise immunity  
0.45 V (typ.)  
CC  
Y
Low power  
TTL compatibility  
Fan out of 2  
driving 74L  
Y
Low power consumption  
10 nW/package (typ.)  
Y
The MM54C86/MM74C86 follows the  
MM54LS86/MM74LS86 Pinout  
to static discharge by diode clamps to V  
and GND.  
CC  
Connection Diagram  
Dual-In-Line Package  
TL/F/5887–1  
Top View  
Order Number MM54C86 or MM74C86  
Truth Table  
Inputs  
Output  
Y
A
B
L
L
L
H
L
L
H
H
L
H
H
H
e
e
H
High Level  
L
Low Level  
C
1995 National Semiconductor Corporation  
TL/F/5887  
RRD-B30M105/Printed in U. S. A.  

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