MLX80104/5
LIN Slave Controller for Switches
Datasheet
25. Land Pattern Recommendations ......................................................................................................................93
26. ESD/EMC Remarks............................................................................................................................................94
26.1
26.2
26.3
ESD/EMC Recommendations for the MLX80104/5........................................................................................ 94
Automotive Qualification Test Pulses ............................................................................................................ 94
EMC Test pulse definition .............................................................................................................................. 95
27. References .......................................................................................................................................................96
28. List of Abbreviations.........................................................................................................................................96
29. Revision History ...............................................................................................................................................97
30. Standard information regarding manufacturability of Melexis products with different soldering processes ....99
31. Disclaimer ......................................................................................................................................................100
List of Figures
FIGURE 1 - BLOCK DIAGRAM...............................................................................................................................................7
FIGURE 2 - BLOCK DIAGRAM OF MULAN CPU................................................................................................................ 13
FIGURE 3 - CPU INTERLEAVING ........................................................................................................................................ 14
FIGURE 4 - EEPROM READ............................................................................................................................................... 18
FIGURE 5 - COMMON PIN STRUCTURE SWX AND IOX........................................................................................................ 26
FIGURE 6 - VOLTAGE DEPENDENCY OF THE SWITCH CURRENT........................................................................................... 30
FIGURE 7 - VOLTAGE DROPS EXTERNAL LS SWITCH.......................................................................................................... 31
FIGURE 8 - VOLTAGE DROPS SWITCH MATRIX.................................................................................................................... 31
FIGURE 9 - VOLTAGE DROPS EXTERNAL HS SWITCH ......................................................................................................... 32
FIGURE 10 - WAKE UP DETECTION FOR SWITCH INPUTS..................................................................................................... 37
FIGURE 11 - STRUCTURE OF SWX PINS.............................................................................................................................. 38
FIGURE 12 - STRUCTURE OF IOX PINS................................................................................................................................ 40
FIGURE 13 - SAMPLE CIRCUITRY FOR IREF PIN ................................................................................................................. 42
FIGURE 14 - ANALOGUE WATCHDOG BEHAVIOUR ............................................................................................................. 44
FIGURE 15 - ADC COMPONENTS........................................................................................................................................ 48
FIGURE 16 - PWM UNIT..................................................................................................................................................... 56
FIGURE 17 - BLOCK DIAGRAM OF TIMER........................................................................................................................... 60
FIGURE 18 - LIN OSI-REFERENCE MODEL......................................................................................................................... 61
FIGURE 19 - RECEIVER DEBOUNCING & PROPAGATION DELAY .......................................................................................... 62
FIGURE 20 - RESET BEHAVIOUR......................................................................................................................................... 67
FIGURE 21 - PATCH HARDWARE ........................................................................................................................................ 69
FIGURE 22 - PATCH CODE IN EEPROM ............................................................................................................................. 70
FIGURE 23 - PATCH CODE IN RAM .................................................................................................................................... 70
FIGURE 24 - APPLICATION SCHEMATIC SAMPLE................................................................................................................. 73
FIGURE 25 - READING THE SWITCH MATRIX ...................................................................................................................... 74
FIGURE 26 - PIN OUT MLX80104/05 – TOP VIEW.............................................................................................................. 77
FIGURE 27 - MLX80104/05 PROGRAMMING INTERFACE WITH THE MELEXIS MINI E-MLX EMULATOR............................. 80
FIGURE 28 - MELEXIS MLX80104/05 PROGRAMMING INTERFACE ADAPTER..................................................................... 81
FIGURE 29 - MLX80104/05 PROGRAMMING INTERFACE WITH THE MELEXIS MINI E-MLX EMULATOR AND MELEXIS
INTERFACE ADAPTER ................................................................................................................................................. 82
FIGURE 30 - CONNECTION DIAGRAM BETWEEN PTC-04 AND MLX80104/5...................................................................... 83
FIGURE 31 - MLX80104/05 PROGRAMMING INTERFACE WITH THE MELEXIS PTC-04....................................................... 85
FIGURE 32 - PIN OUT MLX80104/5 – TOP VIEW................................................................................................................ 90
FIGURE 33 - QFN28 DRAWING.......................................................................................................................................... 92
June 2016
Rev 017
MLX80104/5 – Datasheet
390108010400
Page 5 of 100
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