Datasheet > ML87V2301

ML87V2301

更新时间： 2024-02-08 00:44:57

品牌	Logo	应用领域
冲电气 - OKI		商用集成电路
页数	文件大小	规格书
58页	330K
描述
Consumer Circuit, PQFP208, 28 X 28 MM, 0.50 MM PITCH, PLASTIC, LQFP-208

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ML87V2301 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LFQFP, QFP208,1.2SQ,20	针数：	208
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.37	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	S-PQFP-G208	长度：	28 mm
功能数量：	1	端子数量：	208
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装等效代码：	QFP208,1.2SQ,20	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE, FINE PITCH	电源：	2.5,3.3 V
认证状态：	Not Qualified	座面最大高度：	1.7 mm
子类别：	Other Consumer ICs	最大压摆率：	180 mA
最大供电电压 (Vsup)：	2.75 V	最小供电电压 (Vsup)：	2.25 V
表面贴装：	YES	温度等级：	COMMERCIAL
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	28 mm
Base Number Matches：	1

ML87V2301 数据手册

FEDL87V2301-01

Issue Date: Jan. 15, 2003

OKI Semiconductor

ML87V2301

Scan Converter for FPD-TV

GENERAL DESCRIPTION

The ML87V2301 is an interlace/progressive (I/P) conversion and resolution conversion IC developed for flat panel

displays and CRT television sets.

Video signal of SDTV (525i, 625i, 525p, 625p) or HDTV (1125i, 1250i) is input to the ML87V2301. After

interlace/progressive conversion, the signal undergoes image scaling (magnification/reduction) matching the

number of picture elements (pixels) of a display to be used. By a simplified display involving reduction (shrink)

feature only, the HDTV image allows to display on a display with less number of picture elements.

(Here, SDTV stands for Standard Definition TV, and HDTV stands for High Definition TV.)

A lookup table allows the output data to be adjusted for gamma correction and color balance.

Connecting an external FIFO memory (field memory) to the ML87V2301 in LCD TV applications will provide a

display of higher picture quality I/P conversion.

An on-chip on-screen display controller (OSDC) can display the operation menu etc.

A field memory FIFO, a noise reduction FIFO and a video decoder IC can be used as a set of chips for TVs.

FEATURES

• Input iamge format:

Vertical 525/60/2:1, 625/50/2:1, 525/60/1:1, 625/50/1:1, etc

Horiz. 640 to 960 pixels (normal mode), max 1920 pixels (decimation mode)

QVGA, VGA, SVGA, XGA, Wide-VGA, Wide-SVGA, and Wide-XGA

24-bit RGB (4:4:4), 16-bit YCbCr (4:2:2), 8-bit (ITU-R BT.656)

18/24/36/48-bit RGB (4:4:4), drivability selectable (6 mA/12 mA)

Input maximum 75 MHz, Output maximum 83 MHz

• Output image format:

• Input data:

• Output data:

• Data clock:

• Color space conversion: YCbCr/YPbPr/RGB to RGB

• I/P conversion:

Intra-field line interpolation

With an external FIFO: Inter-field line interpolation

• Scaling:

Magnification/reduction pixel interpolation

Independent horizontal and vertical magnification factor (1/2 to 3 times)

Lookup table 10-bit → 10-bit, R/G/B independent

Comparable 10-bit gray tone with an 8-bit panel

Comparable 8-bit gray tone with a 6-bit panel

Character type, Font RAM, Text RAM

• Gamma correction:

• Dithering:

• OSD controller:

• LCD interface:

• Host interface:

• Power supply voltage:

• Package:

Supports 8-bit or 6-bit color TFT LCD panel

I²C bus serial interface

I/O section: 3.3 V ± 0.3 V, core section: 2.5 V ± 0.25 V. (Dual power supplies)

208-pin plastic LQFP, 0.5 mm pitch (LQFP208-P-2828-0.50-K)

1/58

12 3 4 5 6 7...58

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