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MKM33Z128CLL5 PDF预览

MKM33Z128CLL5

更新时间： 2024-02-11 04:00:25
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恩智浦 - NXP /
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54页 1813K
描述
Security and integrity modules

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MKM33Z128CLL5 数据手册

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Document Number: MKMxxZxxCxx5  
Rev. 7, 01/2014  
Freescale Semiconductor  
Data Sheet: Technical Data  
MKMxxZxxCxx5  
KM Family  
Supports the following:  
MKM14Z64CHH5, MKM14Z128CHH5,  
MKM33Z64CLH5, MKM33Z128CLH5,  
MKM33Z64CLL5, MKM33Z128CLL5,  
MKM34Z128CLL5  
Features  
Security and integrity modules  
– Hardware programmable CRC module to support  
fast cyclic redundancy checks  
– Hardware random-number generator  
– 128-bit unique identification (ID) number per chip  
•
•
Operating Characteristics  
•
– Voltage range: 1.71 V to 3.6 V (when Analog Front  
End (AFE) is not used)  
– Voltage range: 2.7 V to 3.6 V (when Analog Front  
End (AFE) is used)  
– iRTC battery supply voltage range: 1.71 to 3.6 V  
– Flash write voltage range: 1.71 to 3.6 V  
– Temperature range (ambient): -40°C to 85°C  
Human-machine interface  
– Segment LCD controller supporting up to 36  
frontplanes and 8 backplanes or 40 frontplanes and 4  
backplanes  
Performance  
– General-purpose input/output which can acts as  
Rapid GPIO (single cycle access)  
•
•
– Up to 50 MHz ARM Cortex-M0+ core delivering  
0.95 Dhrystone MIPS per MHz  
Analog modules  
– 16-bit SAR ADC  
– 24-bit Analog Front End comprising of 24-bit Sigma  
Delta ADCs (after averaging)  
•
Memories and memory interfaces  
– 128/64 KB program flash memory. There is no  
FlexMemory on these devices  
– 16 KB of single access RAM  
– Programmable Gain Amplifier (PGA with gains  
upto 32)  
– Two analog comparators (CMP) containing a 6-bit  
DAC and programmable reference input  
– 1.2V Voltage reference  
Clocks  
•
•
– 1 to 32 MHz crystal oscillator  
– 32 kHz crystal oscillator  
– Multi-purpose clock generator  
Timers  
•
•
System peripherals  
– 4 channel Quad Timer with 16-bit counters  
– Periodic interrupt timers  
– 16-bit low-power timer  
– Independent Real Time Clock with calendaring and  
compensation  
– Multiple low-power modes to provide power  
optimization based on application requirements  
– Memory protection unit with multi-master  
protection  
– 4-channel DMA controller, supporting up to 64  
request sources  
Communication interfaces  
– One SPI module with FIFO support (supports 5V  
AMR operation)  
– External watchdog monitor  
– Robust watchdog monitor  
– Low-leakage wakeup unit  
– Asynchronous wakeup unit  
– Peripheral Crossbar (allows internal signals to be  
connected to other on-chip modules)  
– One SPI module without FIFO (no AMR operation)  
– Two I2C modules with SMBus support  
– Two UART modules with ISO7816 support and  
Two UART without ISO 7816 support  
– Any one SCI can be used for IrDA operation. 5V  
AMR support on one SCI.  
Freescale reserves the right to change the detail specifications as may be  
required to permit improvements in the design of its products.  
© 2011–2014 Freescale Semiconductor, Inc.  
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