Document Number: MKMxxZxxACxx5
Rev. 1, 09/2014
Freescale Semiconductor
Data Sheet: Advance Information
MKMxxZxxACxx5
KM Family
Supports the following:
MKM14Z64ACHH5,
MKM14Z128ACHH5,
MKM33Z64ACLH5,
MKM33Z128ACLH5,
MKM33Z64ACLL5, MKM33Z128ACLL5,
MKM34Z128ACLL5
Features
Security and integrity modules
– Hardware programmable CRC module to support
fast cyclic redundancy checks
– Hardware random-number generator
– 128-bit unique identification (ID) number per chip
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Operating Characteristics
•
– Voltage range: 1.71 V to 3.6 V (when Analog Front
End (AFE) is not used)
– Voltage range: 2.7 V to 3.6 V (when Analog Front
End (AFE) is used)
– iRTC battery supply voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40°C to 85°C
Human-machine interface
– Segment LCD controller supporting up to 36
frontplanes and 8 backplanes or 40 frontplanes and 4
backplanes
Performance
– General-purpose input/output which can acts as
Rapid GPIO (single cycle access)
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– Up to 50 MHz ARM Cortex-M0+ core delivering
0.95 Dhrystone MIPS per MHz
Analog modules
– 16-bit SAR ADC
– 24-bit Analog Front End comprising of 24-bit Sigma
Delta ADCs (after averaging)
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Memories and memory interfaces
– 128/64 KB program flash memory. There is no
FlexMemory on these devices
– 16 KB of single access RAM
– Programmable Gain Amplifier (PGA with gains
upto 32)
– Two analog comparators (CMP) containing a 6-bit
DAC and programmable reference input
– 1.2V Voltage reference
Clocks
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•
– 1 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
Timers
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System peripherals
– 4 channel Quad Timer with 16-bit counters
– Periodic interrupt timers
– 16-bit low-power timer
– Independent Real Time Clock with calendaring and
compensation
– Multiple low-power modes to provide power
optimization based on application requirements
– Memory protection unit with multi-master
protection
– 4-channel DMA controller, supporting up to 64
request sources
– External watchdog monitor
– Robust watchdog monitor
– Low-leakage wakeup unit
– Asynchronous wakeup unit
– Peripheral Crossbar (allows internal signals to be
connected to other on-chip modules)
This document contains information on a new product. Specifications and
information herein are subject to change without notice.
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