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MKM35Z512VLL7 PDF预览

MKM35Z512VLL7

更新时间: 2024-01-08 18:33:00
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
59页 910K
描述
Kinetis KM35 Sub-Family Data Sheet

MKM35Z512VLL7 数据手册

 浏览型号MKM35Z512VLL7的Datasheet PDF文件第2页浏览型号MKM35Z512VLL7的Datasheet PDF文件第3页浏览型号MKM35Z512VLL7的Datasheet PDF文件第4页浏览型号MKM35Z512VLL7的Datasheet PDF文件第5页浏览型号MKM35Z512VLL7的Datasheet PDF文件第6页浏览型号MKM35Z512VLL7的Datasheet PDF文件第7页 
NXP Semiconductors  
Data Sheet: Technical Data  
KM35P144M75SF0  
Rev. 2, March 2020  
Kinetis KM35 Sub-Family Data  
Sheet  
MKM35Z256VLL7  
MKM35Z256VLQ7  
MKM35Z512VLL7  
MKM35Z512VLQ7  
Enabling high accuracy, secure 1-, 2- and 3-phase electricity  
metering solutions through a powerful analog front end (AFE),  
auto-compensated iRTC with hardware tamper detection,  
segment LCD controller, rich security protection and multiple low  
power features in a 32-bit Arm® Cortex®-M0+ MCU. This product  
offers:  
• Enabling single-chip 1-, 2- and 3-phase metering designs  
• AFE, Security and HMI. Single crystal implementation  
• Single point of calibration during manufacture  
• Highest accuracy metrology with regional feature support  
• Multiple ƩΔ ADCs with PGA  
100 LQFP  
14 mm × 14 mm Pitch 20 mm × 20 mm Pitch  
0.5 mm 0.5 mm  
144 LQFP  
• Supports neutral disconnect use case  
• Compliance with WELMEC/OIML recommendations  
• Memory and peripheral protection  
• Hardware tamper detect with time stamping  
• Low-power RTC, battery backup with tamper memory  
Core  
• Arm® Cortex®-M0+ core up to 75 MHz  
Memories  
• Up to 512 KB program flash memory  
• Up to 64 KB SRAM  
• Metering specific Memory Mapped Arithmetic Unit  
(MMAU)  
Operating Characteristics  
Clocks  
• Voltage range: 1.71 to 3.6 V (without AFE)  
• Voltage range: 2.7 to 3.6 V (with AFE)  
• Temperature range (ambient): –40 to 105 °C  
• 75 MHz high-accuracy internal reference clock  
• 32 kHz, and 4 MHz internal reference clock  
• 1 kHz LPO clock  
Low power features  
• 32.768 kHz crystal oscillator in iRTC power domain  
• 1 MHz to 32 MHz crystal oscillator  
• FLL and PLL  
• 13 power modes to provide power optimization  
based on application requirements  
• 8.82 mA @ 75 MHz run current  
• Less than 220 μA very low power run current  
• 6.05 μA very low power stop current  
• Down to 261 nA deep sleep current  
• VBAT domain current < 1 μA with iRTC operational  
• Low-power boot with less than 2.33 mA peak  
current  
System peripherals  
• Memory Protection Unit (MPU)  
• 4-channel DMA controller  
• Watchdog and EWM  
• Low-leakage Wakeup Unit (LLWU)  
• SWD debug interface and Micro Trace Buffer (MTB)  
• Bit Manipulation Engine (BME)  
• Inter-peripheral Crossbar Switch (XBAR)  
Communication interfaces  
• 16-bit SPI modules  
Analog Modules  
• Low-power UART module  
• UART module complying with ISO7816-3  
• Basic UART module  
• 4 AFE channels (4× 24-bit ƩΔ ADCs with PGA)  
• 16-channel 16-bit SAR ADC with 4 result registers  
• High-speed analog comparator containing a 6-bit DAC  
and programmable reference input  
• I2C with SMBus  
• Internal 1.2 V reference voltage 10–15 ppm/℃  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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