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MK2304-1IT PDF预览

MK2304-1IT

更新时间: 2024-09-26 06:38:11
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
8页 208K
描述
PLL Based Clock Driver, 2304 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8

MK2304-1IT 数据手册

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DATASHEET  
ZERO DELAY, LOW SKEW BUFFER  
MK2304-1  
Description  
Features  
The MK2304-1 is a low jitter, low skew, high performance  
Phase Lock Loop (PLL) based zero delay buffer for high  
speed applications. Based on IDT’s proprietary low jitter  
PLL techniques, the device provides four low skew outputs  
at speeds up to 133 MHz at 3.3 V. The MK2304-1 includes  
two banks of two outputs each 1X. In the zero delay mode,  
the rising edge of the input clock is aligned with the rising  
edges of all 4 outputs. Compared to competitive CMOS  
devices, the MK2304-1 has the lowest jitter.  
Packaged in 8-pin SOIC  
Zero input-output delay  
2 banks of two 1X outputs  
Output to output skew is less than 200 ps  
Output clocks up to 133 MHz at 3.3 V  
Full CMOS outputs with 8 mA output drive capability at  
TTL levels at 3.3 V  
TM  
Spread Smart technology Works with Spread  
IDT manufactures the largest variety of clock generators  
and buffers and is the largest clock supplier in the world.  
Spectrum clock generators  
Advanced, low power, sub micron CMOS process  
Operating voltage of 3.3 V  
Available in industrial temperature range  
Block Diagram  
VDD  
1
FBIN  
PLL  
CLKIN  
CLKA1  
BANK  
A
CLKA2  
CLKB1  
BANK  
B
CLKB2  
1
GND  
IDT™ ZERO DELAY, LOW SKEW BUFFER  
1
MK2304-1  
REV E 010709  

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