MG87FE/L2051/4051/6051
Preliminary, v 1.03
MAKE YOU WIN
Content
1. General Description ..................................................................................... 4
2. Features....................................................................................................... 5
3. Block Diagram.............................................................................................. 6
4. Pin Configurations........................................................................................ 7
4.1. Package Instruction ..............................................................................................................7
4.2. Pin Description (PDIP-20 & SOP-20)....................................................................................8
5. 8051 CPU Function Description................................................................... 9
5.1. CPU Register........................................................................................................................9
5.2. CPU Timing.........................................................................................................................10
5.3. CPU Addressing Mode .......................................................................................................10
6. Memory Organization................................................................................. 11
6.1. On-Chip Program Flash......................................................................................................11
6.2. On-Chip Data RAM.............................................................................................................12
7. Special Function Register .......................................................................... 13
7.1. SFR Map.............................................................................................................................13
7.2. SFR Bit Assignment............................................................................................................14
8. Configurable I/O Ports................................................................................ 16
8.1. IO Structure.........................................................................................................................16
8.1.1. Port1/3/4 GPIO Structure .............................................................................................16
8.2. Port1 Register.....................................................................................................................16
8.3. Port3 Register.....................................................................................................................16
8.4. Port4 Register.....................................................................................................................17
9. Interrupt...................................................................................................... 18
9.1. Interrupt Structure...............................................................................................................18
9.2. Interrupt Register ................................................................................................................19
10. Timers/Counters......................................................................................... 23
10.1. Timer0 and Timer1..............................................................................................................23
10.1.1. Mode 0 Structure..........................................................................................................23
10.1.2. Mode 1 Structure..........................................................................................................23
10.1.3. Mode 2 Structure..........................................................................................................24
10.1.4. Mode 3 Structure..........................................................................................................24
10.1.5. Timer0/1 Register.........................................................................................................25
10.2. PWM-Timer.........................................................................................................................27
10.2.1. PWM-Timer Structure...................................................................................................27
10.2.2. PWM-Timer Register....................................................................................................28
11. UART .........................................................................................................30
11.1. UART Structure...................................................................................................................30
11.2. UART Register....................................................................................................................31
12. Analog Comparator.................................................................................... 33
12.1. Analog Comparator Structure .............................................................................................33
12.2. Analog Comparator Register ..............................................................................................34
13. Watch Dog Timer (WDT)............................................................................35
13.1. WDT Structure ....................................................................................................................35
13.2. WDT Register .....................................................................................................................35
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
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