14. Keypad Interrupt .............................................................................................................40
15. Wake-up from Power-down Mode ..................................................................................41
15.1. Power-down Wake-up Sources .............................................................................41
15.2. Sample Code for Wake-up from Power-down........................................................42
16. Serial Peripheral Interface (SPI).....................................................................................43
16.1. Typical SPI Configurations ....................................................................................45
16.1.1. Single Master & Single Slave...................................................................................45
16.1.2. Dual Device, where either can be a Master or a Slave .............................................45
16.1.3. Single Master & Multiple Slaves..............................................................................46
16.2. Configuring the SPI................................................................................................47
16.2.1. Additional Considerations for a Slave ......................................................................47
16.2.2. Additional Considerations for a Master....................................................................47
16.2.3. Mode Change on /SS-pin..........................................................................................48
16.2.4. No Write Collision....................................................................................................48
16.2.5. SPI Clock Rate Select ...............................................................................................48
16.3. Data Mode.............................................................................................................49
16.3.1. SPI Slave Transfer Format with CPHA=0................................................................49
16.3.2. SPI Slave Transfer Format with CPHA=1................................................................49
16.3.3. SPI Master Transfer Format with CPHA=0..............................................................50
16.3.4. SPI Master Transfer Format with CPHA=1..............................................................50
17. 2-wire Serial Interface (TWSI) ........................................................................................51
17.1. The Special Function Registers for TWSI..............................................................52
17.2. Operating Modes ...................................................................................................54
17.2.1. Master Transmitter Mode..........................................................................................54
17.2.2. Master Receiver Mode..............................................................................................55
17.2.3. Slave Transmitter Mode............................................................................................55
17.2.4. Slave Receiver Mode ................................................................................................56
17.3. Miscellaneous States.............................................................................................57
17.4. Using the TWSI......................................................................................................58
18. One-Time-Enabled Watchdog Timer (WDT)...................................................................64
18.1. WDT Block Diagram ..............................................................................................64
18.2. WDT During Idle and Power Down........................................................................65
18.3. WDT Automatically Enabled by Hardware.............................................................65
18.4. WDT Overflow Period............................................................................................65
18.5. Sample Code for WDT...........................................................................................66
19. Universal Serial Bus (USB).............................................................................................67
19.1. USB Block Diagram...............................................................................................67
19.2. USB FIFO Management ........................................................................................67
19.3. USB Special Function Registers............................................................................68
19.3.1. USB SFR Memory Mapping ....................................................................................68
19.3.2. USB SFR Description...............................................................................................69
20. In-System-Programming (ISP)........................................................................................76
20.1. Description for ISP Operation ................................................................................77
20.2. Demo Program for ISP ..........................................................................................78
21. In-Application-Programming (IAP) ..................................................................................79
21.1. IAP-memory Boundary/Range...............................................................................79
21.2. Update the data in the IAP-memory.......................................................................79
22. System Clock..................................................................................................................80
22.1. Programmable System Clock ................................................................................80
22.2. On-chip XTAL Oscillating Driving Control..............................................................81
23. Power-On Reset .............................................................................................................82
2
MG84FL54B Data Sheet
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