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MCZ33927EK PDF预览

MCZ33927EK

更新时间： 2024-02-27 23:21:15
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 晶体驱动器接口集成电路晶体管场效应晶体管光电二极管
页数 文件大小 规格书
44页 535K
描述
Three-Phase Field Effect Transistor Pre-Driver

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中文翻译

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MCZ33927EK 技术参数

生命周期：Active零件包装代码：SOIC
包装说明：HSSOP,针数：54
Reach Compliance Code：unknown风险等级：5.77
Is Samacsys：N高边驱动器：YES
接口集成电路类型：HALF BRIDGE BASED MOSFET DRIVERJESD-30 代码：R-PDSO-G54
长度：17.9 mm功能数量：1
端子数量：54最高工作温度：125 °C
最低工作温度：-40 °C标称输出峰值电流：0.8 A
封装主体材料：PLASTIC/EPOXY封装代码：HSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, HEAT SINK/SLUG, SHRINK PITCH
认证状态：COMMERCIAL座面最大高度：2.45 mm
最大供电电压：40 V最小供电电压：8 V
标称供电电压：16 V表面贴装：YES
温度等级：AUTOMOTIVE端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
宽度：7.5 mmBase Number Matches：1

MCZ33927EK 数据手册

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ELECTRICAL CHARACTERISTICS  
MAXIMUM RATINGS  
ELECTRICAL CHARACTERISTICS  
MAXIMUM RATINGS  
Table 2. Maximum Ratings  
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or  
permanent damage to the device.  
Ratings  
Symbol  
Value  
Unit  
ELECTRICAL RATINGS  
VBAT Supply Voltage  
VBAT  
V
Normal Operation (Steady-State)  
Transient Survival(1)  
58  
-1.5 to 80  
VPWR Supply Voltage  
VPWR  
V
Normal Operation (Steady-State)  
58  
Transient Survival(1)  
-1.5 to 80  
Charge Pump (PUMP, VPUMP)  
VPUMP  
VLS  
-0.3 to 40  
-0.3 to 18  
-0.3 to 7.0  
-0.3 to 7.0  
-0.3 to 7.0  
V
V
V
V
V
V
VLS Regulator Outputs (VLS, VLS_CAP)  
Logic Supply Voltage  
VDD  
Logic Output (INT, SO, PHASEA, PHASEB, PHASEC, OC_OUT)(2)  
Logic Input Pin Voltage (EN1, EN2, Px_HS, Px_LS, SI, SCLK, CS, RST) 10mA  
VOUT  
VIN  
Amplifier Input Voltage  
VIN_A  
(Both Inputs-GND), (AMP_P - GND) or (AMP_N - GND) 6mA source or sink  
-7.0 to 10.0  
-0.3 to 7.0  
Over-current comparator threshold 10mA  
VOC  
V
V
Driver Output Voltage(3)  
VBOOT  
VHS_G  
VLS_G  
75  
75  
16  
High-Side bootstrap (PA_BOOT, PB_BOOT, PC_BOOT)  
High-Side (PA_HS_G, PB_HS_G, PC_HS_G)  
Low-Side (PA_LS_G, PB_LS_G, PC_LS_G)  
Driver Voltage Transient Survival  
V
High-Side (PA_HS_G, PB_HS_G, PC_HS_G, PA_HS_S, PB_HS_S,  
PC_HS_S)  
VHS_G  
VHS_S  
VLS_G  
VPGND  
-7.0  
-7.0  
-7.0  
-7.0  
Low-Side (PA_LS_G, PB_LS_G, PC_LS_G, PGNDA, PGNDB, PGNDC)  
Continuous Output Current  
ESD Voltage(4)  
IGATE  
VESD  
-0.1 to 0.1  
A
V
Human Body Model - HBM (All pins except for the pins listed below)  
Pins: PA_Boot, PA_HS_S, PA_HS_G, PB_Boot, PB_HS_S,  
PB_HS_G, PC_Boot, PC_HS_S, PC_HS_G, VPWR  
±2000  
±1000  
±750  
Charge Device Model - CDM  
Notes  
1. The device will withstand load dump transient as defined by ISO7637 with peak voltage of 80V.  
2. Short-circuit proof, the device will not be damaged or induce unexpected behavior due to shorts to external sources within this range.  
3. This voltage should not be applied without also taking voltage at HS_S and voltage at PGND_x into account.  
4. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100pF, RZAP = 1500Ω) and the Charge Device  
Model (CDM), Robotic (CZAP = 4.0pF).  
33927  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
6
1...3456789...44

中文翻译

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