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MCM6343TS12 PDF预览

MCM6343TS12

更新时间: 2024-02-16 12:04:18
品牌 Logo 应用领域
恩智浦 - NXP 输入元件静态存储器光电二极管输出元件内存集成电路
页数 文件大小 规格书
10页 297K
描述
IC,SRAM,256KX16,CMOS,TSOP,44PIN,PLASTIC

MCM6343TS12 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:TSOP2-44Reach Compliance Code:unknown
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.91最长访问时间:12 ns
JESD-30 代码:R-PDSO-G44JESD-609代码:e0
长度:18.41 mm内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
功能数量:1端口数量:1
端子数量:44字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX16输出特性:3-STATE
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

MCM6343TS12 数据手册

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Freescale Semiconductor, Inc.  
SEMICONDUCTOR TECHNICAL DATA  
Order this document  
by MCM6343/D  
MCM6343  
256K x 16 Bit 3.3 V Asynchronous  
Fast Static RAM  
The MCM6343 is a 4,194,304–bit static random access memory organized as  
262,144 words of 16 bits. Static design eliminates the need for external clocks  
or timing strobes.  
YJ PACKAGE  
400 MIL SOJ  
CASE 919–01  
The MCM6343 is equipped with chip enable (E), write enable (W), and output  
enable (G) pins, allowing for greater system flexibility and eliminating bus con-  
tention problems. Separate byte enable controls (LB and UB) allow individual  
bytes to be written and read. LB controls the lower bits DQL [7:0], while UB con-  
trols the upper bits DQU [7:0].  
TS PACKAGE  
TSOP TYPE II  
CASE 924A–02  
The MCM6343 is available in a 400 mil, 44–lead small–outline SOJ package  
and a 44–lead TSOP Type II package.  
Single 3.3 V Power Supply  
Fast Access Time: 10/11/12/15 ns  
Equal Address and Chip Enable Access Time  
All Inputs and Outputs are TTL Compatible  
Data Byte Control  
Fully Static Operation  
Power Operation: 200/195/190/180 mA Maximum, Active AC  
Commercial (0°C to 70°C) and  
PIN ASSIGNMENT  
A
A
A
A
A
1
2
3
4
5
44  
43  
42  
41  
40  
A
A
A
G
UB  
Industrial Temperature (– 40 to 85°C) Options  
E
DQL  
DQL  
DQL  
DQL  
6
39  
38  
37  
36  
35  
LB  
7
DQU  
DQU  
DQU  
DQU  
8
9
BLOCK DIAGRAM  
10  
OUTPUT  
ENABLE  
BUFFER  
G
HIGH BYTE OUTPUT ENABLE  
V
V
11  
12  
13  
14  
15  
34  
33  
32  
31  
30  
V
V
DD  
SS  
SS  
DD  
LOW BYTE OUTPUT ENABLE  
DQL  
DQL  
DQL  
DQU  
DQU  
DQU  
HIGH  
BYTE  
OUTPUT  
BUFFER  
9
8
8
ADDRESS  
BUFFERS  
A*  
9
ROW  
COLUMN  
DECODER DECODER  
18  
DQL  
W
16  
17  
29  
28  
DQU  
NC  
HIGH  
BYTE  
WRITE  
DRIVER  
8
A
A
A
A
A
18  
19  
20  
21  
22  
27  
26  
25  
24  
23  
A
A
A
A
A
CHIP  
ENABLE  
BUFFER  
E
8
SENSE  
AMPS  
256K x 16  
16  
BIT  
WRITE  
ENABLE  
BUFFER  
LOW  
BYTE  
OUTPUT  
BUFFER  
MEMORY  
ARRAY  
W
8
8
PIN NAMES  
A [17:0] . . . . . . . . . . . . . . . . . . Address Input  
E . . . . . . . . . . . . . . . . . . . . . . . . . Chip Enable  
W . . . . . . . . . . . . . . . . . . . . . . . Write Enable  
G . . . . . . . . . . . . . . . . . . . . . . Output Enable  
UB . . . . . . . . . . . . . . . . . . Upper Byte Select  
LB . . . . . . . . . . . . . . . . . . . Lower Byte Select  
DQL [7:0] . . . . . . . . . . . . Data I/O, Low Byte  
DQU [7:0] . . . . . . . . . . . Data I/O, High Byte  
LOW  
BYTE  
WRITE  
DRIVER  
8
LB  
UB  
8
BYTE  
ENABLE  
BUFFER  
HIGH BYTE WRITE ENABLE  
LOW BYTE WRITE ENABLE  
* Address (A) and Data (DQU, DQL) signals are assigned by customer, such that  
PCB layout is optimized for a given design.  
V
DD  
V
SS  
. . . . . . . . . . . . . . + 3.3 V Power Supply  
. . . . . . . . . . . . . . . . . . . . . . . . . . Ground  
NC . . . . . . . . . . . . . . . . . . . . . No Connection  
REV 8  
2/2/99  
Motorola, Inc. 1999  
For More Information On This Product,  
Go to: www.freescale.com  

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