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MCIMX6D5CZK08AD

更新时间： 2024-01-04 22:28:20
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恩智浦 - NXP /
页数 文件大小 规格书
161页 1677K
描述
i.MX 6Dual/6Quad Applications Processors Consumer - PoP

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MCIMX6D5CZK08AD 数据手册

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Document Number: IMX6DQCPOPEC  
Rev. 2, 11/2018  
NXP Semiconductors  
Data Sheet: Technical Data  
MCIMX6Q5ExxxxD  
MCIMX6Q7CxxxxD  
MCIMX6Q5ExxxxE  
MCIMX6Q7CxxxxE  
MCIMX6D5ExxxxD  
MCIMX6D7CxxxxD  
MCIMX6D5ExxxxE  
MCIMX6D7CxxxxE  
i.MX 6Dual/6Quad  
Applications Processors  
Consumer - PoP  
Package Information  
Plastic Package  
12 x 12 mm, 0.4 mm pitch  
Ordering Information  
See Table 1  
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 2  
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.3 Signal Naming Convention . . . . . . . . . . . . . . . . . . . 7  
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
2.1 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
3.1 Special Signal Considerations. . . . . . . . . . . . . . . . 17  
3.2 Recommended Connections for Unused Analog  
Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 18  
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 18  
4.2 Power Supplies Requirements and Restrictions . . 31  
4.3 Integrated LDO Voltage Regulator Parameters . . 32  
4.4 PLL Electrical Characteristics . . . . . . . . . . . . . . . . 34  
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 35  
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 36  
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 41  
4.8 Output Buffer Impedance Parameters. . . . . . . . . . 45  
4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . 48  
4.10 Multi-Mode DDR Controller (MMDC). . . . . . . . . . . 60  
4.11 General-Purpose Media Interface (GPMI) Timing. 60  
4.12 External Peripheral Interface Parameters . . . . . . . 69  
Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 130  
5.1 Boot Mode Configuration Pins. . . . . . . . . . . . . . . 130  
5.2 Boot Devices Interfaces Allocation . . . . . . . . . . . 131  
Package Information and Contact Assignments. . . . . . 133  
6.1 Signal Naming Convention . . . . . . . . . . . . . . . . . 133  
6.2 21 x 21 mm Package Information . . . . . . . . . . . . 133  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156  
1 Introduction  
The i.MX 6Dual/6Quad processors are part of a growing  
family of multimedia-focused products that offer high  
performance processing and are optimized for lowest  
power consumption.  
2
3
The i.MX 6Dual/6Quad processors feature advanced  
4
®
®
implementation of the quad Arm Cortex -A9 core,  
which operates at speeds up to 800 MHz. They include  
2D and 3D graphics processors, 1080p video processing,  
and integrated power management. Each processor  
provides a 2 × 32-bit LPDDR2-800 memory interface  
and a number of other interfaces for connecting  
®
peripherals, such as WLAN, Bluetooth , GPS, hard  
drive, displays, and camera sensors.  
The i.MX 6Dual/6Quad processors are specifically  
useful for applications such as the following:  
5
6
7
•
•
•
High-end mobile Internet devices (MID)  
High-end PDAs  
High-end portable media players (PMP) with HD  
video capability  
NXP Reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  
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