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MCF5474ZP266 PDF预览

MCF5474ZP266

更新时间: 2024-09-28 14:20:47
品牌 Logo 应用领域
恩智浦 - NXP 时钟外围集成电路
页数 文件大小 规格书
34页 411K
描述
MCF547X V4ECORE MMU, FPU

MCF5474ZP266 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Transferred零件包装代码:BGA
包装说明:BGA, BGA388,26X26,40针数:388
Reach Compliance Code:not_compliantECCN代码:5A992
HTS代码:8542.31.00.01风险等级:5.43
Is Samacsys:N地址总线宽度:32
位大小:32边界扫描:YES
最大时钟频率:66.66 MHz外部数据总线宽度:32
格式:FLOATING POINT集成缓存:YES
JESD-30 代码:S-PBGA-B388JESD-609代码:e0
长度:27 mm低功率模式:YES
湿度敏感等级:3端子数量:388
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA388,26X26,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):260
电源:1.5,2.5,3.3 V认证状态:Not Qualified
座面最大高度:2.55 mm速度:266.66 MHz
子类别:Microprocessors最大供电电压:1.58 V
最小供电电压:1.43 V标称供电电压:1.5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead/Silver (Sn/Pb/Ag)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:27 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

MCF5474ZP266 数据手册

 浏览型号MCF5474ZP266的Datasheet PDF文件第2页浏览型号MCF5474ZP266的Datasheet PDF文件第3页浏览型号MCF5474ZP266的Datasheet PDF文件第4页浏览型号MCF5474ZP266的Datasheet PDF文件第5页浏览型号MCF5474ZP266的Datasheet PDF文件第6页浏览型号MCF5474ZP266的Datasheet PDF文件第7页 
Freescale Semiconductor  
Data Sheet  
Document Number: MCF5475EC  
Rev. 4, 12/2007  
MCF547x  
MCF547x ColdFire®  
Microprocessor  
TEPBGA–388  
27 mm x 27 mm  
Supports MCF5470, MCF5471,  
MCF5472, MCF5473, MCF5474, and  
MCF5475  
Features list:  
• ColdFire V4e Core  
endpoints, interrupt, bulk, or isochronous  
– 4-Kbytes of shared endpoint FIFO RAM and 1 Kbyte  
of endpoint descriptor RAM  
– Limited superscalar V4 ColdFire processor core  
– Up to 266 MHz peak internal core frequency (410 MIPS  
[Dhrystone 2.1] @ 266 MHz)  
– Harvard architecture  
– 32-Kbyte instruction cache  
– Integrated physical layer interface  
– Up to four programmable serial controllers (PSCs) each  
with separate 512-byte receive and transmit FIFOs for  
UART, USART, modem, codec, and IrDA 1.1 interfaces  
2
– I C peripheral interface  
– 32-Kbyte data cache  
– DMA Serial Peripheral Interface (DSPI)  
• Optional Cryptography accelerator module  
– Execution units for:  
– Memory Management Unit (MMU)  
– Separate, 32-entry, fully-associative instruction and  
data translation lookahead buffers  
– DES/3DES block cipher  
– Floating point unit (FPU)  
– AES block cipher  
– RC4 stream cipher  
– Double-precision conforms to IEE-754 standard  
– Eight floating point registers  
– MD5/SHA-1/SHA-256/HMAC hashing  
– Random Number Generator  
• 32-Kbyte system SRAM  
• Internal master bus (XLB) arbiter  
– High performance split address and data transactions  
– Support for various parking modes  
• 32-bit double data rate (DDR) synchronous DRAM  
(SDRAM) controller  
– Arbitration mechanism shares bandwidth between  
internal bus masters  
• System integration unit (SIU)  
– Interrupt controller  
– 66–133 MHz operation  
– Supports DDR and SDR DRAM  
– Watchdog timer  
– Built-in initialization and refresh  
– Up to four chip selects enabling up to one GB of external  
memory  
– Two 32-bit slice timers alarm and interrupt generation  
– Up to four 32-bit general-purpose timers, compare, and  
PWM capability  
Version 2.2 peripheral component interconnect (PCI) bus  
– 32-bit target and initiator operation  
– Support for up to five external PCI masters  
– 33–66 MHz operation with PCI bus to XLB divider  
ratios of 1:1, 1:2, and 1:4  
• Flexible multi-function external bus (FlexBus)  
– Provides a glueless interface to boot flash/ROM,  
SRAM, and peripheral devices  
– GPIO ports multiplexed with peripheral pins  
• Debug and test features  
– ColdFire background debug mode (BDM) port  
– JTAG/ IEEE 1149.1 test access port  
• PLL and clock generator  
– 30 to 66.67 MHz input frequency range  
• Operating Voltages  
– 1.5V internal logic  
– Up to six chip selects  
– 2.5V DDR SDRAM bus I/O  
– 3.3V PCI, FlexBus, and all other I/O  
• Estimated power consumption  
– Less than 1.5W (388 PBGA)  
– 33 – 66 MHz operation  
• Communications I/O subsystem  
– Intelligent 16 channel DMA controller  
– Up to two 10/100 Mbps fast Ethernet controllers (FECs)  
each with separate 2-Kbyte receive and transmit FIFOs  
– Universal serial bus (USB) version 2.0 device controller  
– Support for one control and six programmable  
© Freescale Semiconductor, Inc., 2007. All rights reserved.  

MCF5474ZP266 替代型号

型号 品牌 替代类型 描述 数据表
MCF5485CVR200 NXP

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MCF548X V4ECORE MMU, FPU
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MCF5484CZP200 NXP

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MCF548X V4ECORE MMU, FPU

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