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MCF5471ZP200

更新时间： 2024-09-29 14:59:27

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
34页	411K
描述
MCF547X V4ECORE MMU, FPU

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数据手册
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MCF5471ZP200 数据手册

Freescale Semiconductor

Data Sheet

Document Number: MCF5475EC

Rev. 4, 12/2007

MCF547x

MCF547x ColdFire^®

Microprocessor

TEPBGA–388

27 mm x 27 mm

Supports MCF5470, MCF5471,

MCF5472, MCF5473, MCF5474, and

MCF5475

Features list:

• ColdFire V4e Core

endpoints, interrupt, bulk, or isochronous

– 4-Kbytes of shared endpoint FIFO RAM and 1 Kbyte

of endpoint descriptor RAM

– Limited superscalar V4 ColdFire processor core

– Up to 266 MHz peak internal core frequency (410 MIPS

[Dhrystone 2.1] @ 266 MHz)

– Harvard architecture

– 32-Kbyte instruction cache

– Integrated physical layer interface

– Up to four programmable serial controllers (PSCs) each

with separate 512-byte receive and transmit FIFOs for

UART, USART, modem, codec, and IrDA 1.1 interfaces

– I C peripheral interface

– 32-Kbyte data cache

– DMA Serial Peripheral Interface (DSPI)

• Optional Cryptography accelerator module

– Execution units for:

– Memory Management Unit (MMU)

– Separate, 32-entry, fully-associative instruction and

data translation lookahead buffers

– DES/3DES block cipher

– Floating point unit (FPU)

– AES block cipher

– RC4 stream cipher

– Double-precision conforms to IEE-754 standard

– Eight floating point registers

– MD5/SHA-1/SHA-256/HMAC hashing

– Random Number Generator

• 32-Kbyte system SRAM

• Internal master bus (XLB) arbiter

– High performance split address and data transactions

– Support for various parking modes

• 32-bit double data rate (DDR) synchronous DRAM

(SDRAM) controller

– Arbitration mechanism shares bandwidth between

internal bus masters

• System integration unit (SIU)

– Interrupt controller

– 66–133 MHz operation

– Supports DDR and SDR DRAM

– Watchdog timer

– Built-in initialization and refresh

– Up to four chip selects enabling up to one GB of external

memory

– Two 32-bit slice timers alarm and interrupt generation

– Up to four 32-bit general-purpose timers, compare, and

PWM capability

• Version 2.2 peripheral component interconnect (PCI) bus

– 32-bit target and initiator operation

– Support for up to five external PCI masters

– 33–66 MHz operation with PCI bus to XLB divider

ratios of 1:1, 1:2, and 1:4

• Flexible multi-function external bus (FlexBus)

– Provides a glueless interface to boot flash/ROM,

SRAM, and peripheral devices

– GPIO ports multiplexed with peripheral pins

• Debug and test features

– ColdFire background debug mode (BDM) port

– JTAG/ IEEE 1149.1 test access port

• PLL and clock generator

– 30 to 66.67 MHz input frequency range

• Operating Voltages

– 1.5V internal logic

– Up to six chip selects

– 2.5V DDR SDRAM bus I/O

– 3.3V PCI, FlexBus, and all other I/O

• Estimated power consumption

– Less than 1.5W (388 PBGA)

– 33 – 66 MHz operation

• Communications I/O subsystem

– Intelligent 16 channel DMA controller

– Up to two 10/100 Mbps fast Ethernet controllers (FECs)

each with separate 2-Kbyte receive and transmit FIFOs

– Universal serial bus (USB) version 2.0 device controller

– Support for one control and six programmable

12 3 4 5 6 7...34

中文翻译

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MCF5471ZP200 替代型号

型号	品牌	替代类型	描述	数据表
MCF5471VR200	NXP	类似代替	MCF547X V4ECORE MMU, FPU

与MCF5471ZP200相关器件

型号	品牌	获取价格	描述	数据表
MCF5472	FREESCALE	获取价格	MCF547x Integrated Microprocessor Electrical Characteristics
MCF5472EC	FREESCALE	获取价格	MCF547x ColdFire Microprocessor
MCF5472VF200	MOTOROLA	获取价格	Microprocessor
MCF5472VR200	ROCHESTER	获取价格	32-BIT, 200MHz, RISC PROCESSOR, PBGA388, 27 X 27 MM, MS-034AAL-1, PBGA-388
MCF5472VR200	NXP	获取价格	MCF547X V4ECORE MMU, FPU
MCF5472ZP200	ROCHESTER	获取价格	32-BIT, 200 MHz, RISC PROCESSOR, PBGA388, 27 X 27 MM, MS-034AAL-1, PBGA-388
MCF5472ZP200	MOTOROLA	获取价格	32-BIT, 200 MHz, RISC PROCESSOR, PBGA388, 27 X 27 MM, 1 MM PITCH, PLASTIC, MS-034AAL-1, BG
MCF5473	FREESCALE	获取价格	MCF547x Integrated Microprocessor Electrical Characteristics
MCF5473EC	FREESCALE	获取价格	MCF547x ColdFire Microprocessor
MCF5473VF200	MOTOROLA	获取价格	Microprocessor

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