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MCF54455CVR200 PDF预览

MCF54455CVR200

更新时间: 2024-09-28 04:11:59
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Microprocessor

MCF54455CVR200 数据手册

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Freescale Semiconductor  
Data Sheet: Advance Information  
Document Number: MCF54455  
Rev. 1, 02/2008  
MCF54455  
MAPBGA–256  
17mm x 17mm  
TEPBGA–360  
23mm x 23mm  
MCF5445x ColdFire®  
Microprocessor Data Sheet  
Features  
®
Version 4 ColdFire Core with MMU and EMAC  
• Up to 410 Dhrystone 2.1 MIPS @ 266 MHz  
• 16-kBytes instruction cache and 16-kBytes data cache  
• 32-kBytes internal SRAM  
• Support for booting from SPI-compatible flash, EEPROM,  
and FRAM devices  
• Crossbar switch technology (XBS) for concurrent access to  
peripherals or RAM from multiple bus masters  
• 16-channel DMA controller  
• 16-bit 133-MHz DDR/mobile-DDR/DDR2 controller  
• USB 2.0 On-the-Go controller with ULPI support  
• 32-bit PCI controller @ 66MHz  
ATA/ATAPI controller  
• 2 10/100 Ethernet MACs  
• Coprocessor for acceleration of the DES, 3DES, AES,  
MD5, and SHA-1 algorithms  
• Random number generator  
• Synchronous serial interface (SSI)  
• 4 periodic interrupt timers (PIT)  
• 4 32-bit timers with DMA support  
• DMA-supported serial peripheral interface (DSPI)  
• 3 UARTs  
2
• I C bus interface  
This document contains information on a new product. Specifications and information herein  
are subject to change without notice.  
© Freescale Semiconductor, Inc., 2008. All rights reserved.  

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