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MC74HC257N PDF预览

MC74HC257N

更新时间: 2024-10-01 23:01:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 复用器
页数 文件大小 规格书
6页 178K
描述
Quad 2-Input Data Selector/Multiplexer with 3-State Outputs

MC74HC257N 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
16  
High–Performance Silicon–Gate CMOS  
1
The MC74HC257 is identical in pinout to the LS257. The device inputs are  
compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
D SUFFIX  
This device selects a (4–bit) nibble from either the A or B inputs as  
determined by the Select input. The nibble is presented at the outputs in  
noninverted form when the Output Enable pin is at a low level. A high level on  
the Output Enable pin switches the outputs into the high–impedance state.  
The HC257 is similar in function to the HC157 which do not have 3–state  
outputs.  
16  
SOIC PACKAGE  
CASE 751B–05  
1
ORDERING INFORMATION  
MC74HCXXXN  
MC74HCXXXD  
Plastic  
SOIC  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
PIN ASSIGNMENT  
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
SELECT  
1
2
16  
15  
V
CC  
OUTPUT  
ENABLE  
A0  
B0  
Y0  
A1  
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
A3  
B3  
Y3  
A2  
B2  
Y2  
Chip Complexity: 108 FETs or 27 Equivalent Gates  
B1  
Y1  
LOGIC DIAGRAM  
GND  
2
A0  
5
NIBBLE  
A INPUT  
A1  
A2  
A3  
11  
14  
FUNCTION TABLE  
4
7
Y0  
Y1  
Y2  
Y3  
Inputs  
Output  
Enable Select  
Outputs  
3
NONINVERTING  
NIBBLE  
OUTPUT  
B0  
B1  
B2  
B3  
9
Y0 – Y3  
6
NIBBLE  
B INPUT  
12  
H
L
L
X
L
H
Z
10  
13  
A0 – A3  
B0 – B3  
X = don’t care  
Z = high impedance  
A0A3, B0B3 = the levels of the  
respective Nibble Inputs.  
1
SELECT  
15  
OUTPUT  
ENABLE  
PIN 16 = V  
CC  
PIN 8 = GND  
10/95  
REV 6  
Motorola, Inc. 1995  

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