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MC74AC4040 PDF预览

MC74AC4040

更新时间: 2024-11-19 04:28:43
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器
页数 文件大小 规格书
5页 125K
描述
12-STAGE BINARY RIPPLE COUNTER

MC74AC4040 数据手册

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12-STAGE  
BINARY RIPPLE  
COUNTER  
The MC74AC4040 consists of 12 master-slave flip-flops. The output of each  
flip-flop feeds the next and the frequency at each output is half that of the preceding  
one. The state of the counter advances on the negative-going edge of the Clock  
input. Reset is asynchronous and active-high.  
State changes of the Q outputs do not occur simultaneously because of internal  
ripple delays. Therefore, decoded output signals are subject to decoding spikes  
and may have to be gated with the Clock of the MC74AC4040 for some designs.  
140 MHz Typ. Clock  
Outputs Source/Sink 24 mA  
Operating Voltage Range: 2.0 to 6.0 V  
High Noise Immunity  
N SUFFIX  
CASE 648-08  
PLASTIC  
V
Q11  
15  
Q10  
14  
Q8  
13  
Q9 RESET CLK  
Q1  
9
CC  
16  
12  
11  
10  
D SUFFIX  
CASE 751B-05  
PLASTIC  
1
2
3
4
5
6
7
8
Q12  
Q6  
Q5  
Q7  
Q4  
Q3  
Q2  
GND  
LOGIC DIAGRAM  
FUNCTION TABLE  
Clock  
Reset  
Output State  
9
7
6
5
3
2
4
Q1  
Q2  
L
L
No Change  
Advance to next state  
All Outputs are low  
Q3  
Q4  
X
H
10  
Q5  
CLOCK  
Q6  
Q7  
13  
12  
14  
15  
1
Q8  
Q9  
Q10  
Q11  
Q12  
11  
RESET  
PIN 16 = V  
CC  
PIN 8 = GND  
FACT DATA  
5-1  

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