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MC14515BDW PDF预览

MC14515BDW

更新时间: 2024-01-23 21:11:17
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器
页数 文件大小 规格书
12页 204K
描述
4-Bit Transparent Latch/4-to-16 Line Decoder

MC14515BDW 技术参数

生命周期:Transferred零件包装代码:SOIC
包装说明:SOP,针数:24
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.17
其他特性:ADDRESS LATCHES系列:4000/14000/40000
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:15.4 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER功能数量:1
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):800 ns认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

MC14515BDW 数据手册

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The MC14514B and MC14515B are two output options of a 4 to 16  
line decoder with latched inputs. The MC14514B (output active high  
option) presents a logical “1” at the selected output, whereas the  
MC14515B (output active low option) presents a logical “0” at the  
selected output. The latches are R–S type flip–flops which hold the  
last input data presented prior to the strobe transition from “1” to “0”.  
These high and low options of a 4–bit latch/4 to 16 line decoder are  
constructed with N–channel and P–channel enhancement mode  
devices in a single monolithic structure. The latches are R–S type  
flip–flops and data is admitted upon a signal incident at the strobe  
input, decoded, and presented at the output.  
http://onsemi.com  
MARKING  
DIAGRAMS  
24  
PDIP–24  
P SUFFIX  
CASE 709  
These complementary circuits find primary use in decoding  
applications where low power dissipation and/or high noise immunity  
is desired.  
MC145XXBCP  
AWLYYWW  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
1
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
24  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 1.)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
SOIC–24  
DW SUFFIX  
CASE 751E  
145XXB  
AWLYYWW  
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
1
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
XX  
A
= Specific Device Code  
= Assembly Location  
P
D
Power Dissipation,  
500  
mW  
WL or L = Wafer Lot  
per Package (Note 2.)  
YY or Y = Year  
WW or W = Work Week  
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
ORDERING INFORMATION  
T
Lead Temperature  
L
(8–Second Soldering)  
Device  
Package  
PDIP–24  
SOIC–24  
Shipping  
1. Maximum Ratings are those values beyond which damage to the device  
may occur.  
2. Temperature Derating:  
MC14514BCP  
MC14514BDW  
MC14514BDWR2  
15/Rail  
30/Rail  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
SOIC–24 1000/Tape & Reel  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14515BCP  
MC14515BDW  
MC14515BDWR2  
PDIP–24  
SOIC–24  
15/Rail  
30/Rail  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SOIC–24 1000/Tape & Reel  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14514B/D  

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