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MC14081BDTR2 PDF预览

MC14081BDTR2

更新时间： 2024-11-03 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
12页 138K
描述
B-SUFFIX SERIES CMOS GATES

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中文翻译

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MC14081BDTR2 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP14,.25
针数：14Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.27
系列：4000/14000/40000JESD-30 代码：R-PDSO-G14
JESD-609代码：e4长度：5 mm
负载电容（CL）：50 pF逻辑集成电路类型：AND GATE
湿度敏感等级：1功能数量：4
输入次数：2端子数量：14
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP14,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：5/15 V
Prop。Delay @ Nom-Sup：300 ns传播延迟（tpd）：300 ns
认证状态：Not Qualified施密特触发器：NO
座面最大高度：1.2 mm子类别：Gates
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：4.4 mm
Base Number Matches：1

MC14081BDTR2 数据手册

 浏览型号MC14081BDTR2的Datasheet PDF文件第2页浏览型号MC14081BDTR2的Datasheet PDF文件第3页浏览型号MC14081BDTR2的Datasheet PDF文件第4页浏览型号MC14081BDTR2的Datasheet PDF文件第5页浏览型号MC14081BDTR2的Datasheet PDF文件第6页浏览型号MC14081BDTR2的Datasheet PDF文件第7页 
MC14001B Series  
B−Suffix Series CMOS Gates  
MC14001B, MC14011B, MC14023B,  
MC14025B, MC14071B, MC14073B,  
MC14081B, MC14082B  
http://onsemi.com  
MARKING  
The B Series logic gates are constructed with P and N channel  
enhancement mode devices in a single monolithic structure  
(Complementary MOS). Their primary use is where low power  
dissipation and/or high noise immunity is desired.  
DIAGRAMS  
14  
PDIP−14  
P SUFFIX  
CASE 646  
Features  
MC140xxBCP  
AWLYYWW  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• All Outputs Buffered  
• Capable of Driving Two Low−power TTL Loads or One Low−power  
Schottky TTL Load Over the Rated Temperature Range.  
• Double Diode Protection on All Inputs Except: Triple Diode  
Protection on MC14011B and MC14081B  
1
14  
SOIC−14  
D SUFFIX  
CASE 751A  
140xxB  
AWLYWW  
1
14  
• Pin−for−Pin Replacements for Corresponding CD4000 Series  
B Suffix Devices  
TSSOP−14  
DT SUFFIX  
CASE 948G  
14  
0xxB  
ALYW  
• Pb−Free Packages are Available*  
1
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
14  
Symbol  
Parameter  
Value  
−0.5 to +18.0  
Unit  
V
SOEIAJ−14  
F SUFFIX  
CASE 965  
MC140xxB  
AWLYWW  
V
DD  
DC Supply Voltage Range  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
−0.5 to V + 0.5  
V
DD  
1
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
xx  
A
WL, L  
YY, Y  
= Specific Device Code  
= Assembly Location  
= Wafer Lot  
P
D
Power Dissipation, per Package  
(Note 1)  
500  
mW  
= Year  
WW, W = Work Week  
T
Ambient Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
DEVICE INFORMATION  
Description  
T
Lead Temperature  
(8−Second Soldering)  
L
Device  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
MC14001B  
MC14011B  
Quad 2−Input NOR Gate  
Quad 2−Input NAND Gate  
MC14023B  
MC14025B  
MC14071B  
MC14073B  
Triple 3−Input NAND Gate  
Triple 3−Input NOR Gate  
Quad 2−Input OR Gate  
Triple 3−Input AND Gate  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high−impedance circuit. For proper operation, V and V should be constrained  
MC14081B  
MC14082B  
Quad 2−Input AND Gate  
Dual 4−Input AND Gate  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
February, 2005 − Rev. 4  
MC14001B/D  
 
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中文翻译

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MC14081BDTR2 替代型号

型号 品牌 替代类型 描述 数据表
MC14081BDTR2G ONSEMI

完全替代

 B-Suffix Series CMOS Gates
CD4081BPWR TI

功能相似

 CMOS AND GATES
CD4081BPW TI

功能相似

 CMOS AND GATES

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