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MC10H165LDS PDF预览

MC10H165LDS

更新时间: 2024-09-23 13:11:15
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MC10H165LDS 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10H165 is an 8–Input Priority Encoder. This 10H part is a  
functional/pinout duplication of the standard MECL 10K family part, with 100%  
improvement in propagation delay, and no increases in power–  
supply current.  
Propagation Delay, Data–to–Output, 2.2 ns Typical  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
Voltage Compensated  
MECL 10K–Compatible  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
FN SUFFIX  
PLCC  
CASE 775–02  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
50  
CC  
EE  
Output CurrentContinuous  
— Surge  
I
out  
100  
TRUTH TABLE  
Operating Temperature Range  
T
A
0 to +75  
°C  
°C  
DATA INPUTS  
OUTPUTS  
Storage Temperature RangePlastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
D0 D1 D2 D3 D4 D5 D6 D7 Q3 Q2 Q1 Q0  
H
L
L
L
L
L
L
L
L
X
H
L
L
L
L
L
L
L
X
X
H
L
L
L
L
L
L
X
X
X
H
L
L
L
L
L
X
X
X
X
H
L
L
L
L
X
X
X
X
X
H
L
X
X
X
X
X
X
H
L
X
X
X
X
X
X
X
H
L
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
L
L
H
L
H
L
H
L
H
L
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
25°  
75°  
L
H
H
H
H
L
Characteristic  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Unit  
L
H
H
L
Power Supply Current  
I
E
144  
131  
144  
mA  
L
L
L
Input Current High  
Pin 4  
Data Inputs  
I
µAdc  
inH  
510  
600  
320  
370  
320  
370  
DIP  
PIN ASSIGNMENT  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
OH  
V
OL  
V
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
V
IH  
Q2  
Q3  
D2  
D5  
Q1  
V
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45  
Vdc  
IL  
Q0  
AC PARAMETERS  
CLOCK  
D0  
Propagation Delay  
Data Input Output  
Clock Input Output  
t
pd  
ns  
0.7  
0.7  
3.4  
2.2  
0.7  
0.7  
3.4  
2.2  
0.7  
0.7  
3.4  
2.2  
D4  
D3  
D6  
D7  
Set–up Time  
Hold Time  
Rise Time  
Fall Time  
NOTE:  
t
3.0  
0.5  
0.5  
0.5  
3.0  
0.5  
0.5  
0.5  
3.0  
0.5  
0.5  
0.5  
ns  
ns  
ns  
ns  
set  
t
hold  
D1  
t
r
2.4  
2.4  
2.4  
2.4  
2.4  
2.4  
V
EE  
t
f
Pin assignment is for Dual–in–Line Package.  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a  
50–ohm resistor to –2.0 volts.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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