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MC10106PS PDF预览

MC10106PS

更新时间: 2024-01-16 15:34:37
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA
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4页 104K
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MC10106PS 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10106 is a triple 4–3–3 input NOR gate.  
P
= 30 mW typ/gate (No Load)  
= 2.0 ns typ  
D
t
pd  
t , t = 2.0 ns typ (20%–80%)  
r f  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
LOGIC DIAGRAM  
4
5
FN SUFFIX  
PLCC  
CASE 775–02  
3
6
7
9
10  
11  
2
DIP  
PIN ASSIGNMENT  
12  
13  
14  
15  
V
B
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
C
C
C
C
OUT  
IN  
OUT  
OUT  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
A
CC1  
CC2  
EE  
A
IN  
IN  
A
IN  
IN  
B
A
IN  
IN  
IN  
IN  
B
B
A
IN  
V
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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