Datasheet > MC10105_02

MC10105_02

更新时间： 2024-09-29 04:59:43

品牌	Logo	应用领域
安森美 - ONSEMI		栅
页数	文件大小	规格书
8页	107K
描述
Triple 2-3-2-Input OR/NOR Gate

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数据手册

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MC10105_02 数据手册

MC10105

Triple 2-3-2-Input OR/NOR

Gate

The MC10105 is a triple 2–3–2 input OR/NOR gate.

• P = 30 mW typ/gate (No Load)

• t = 2.0 ns typ

http://onsemi.com

• t , t = 2.0 ns typ (20%–80%)

MARKING

DIAGRAMS

LOGIC DIAGRAM

CDIP–16

L SUFFIX

CASE 620

MC10105L

AWLYYWW

PDIP–16

P SUFFIX

CASE 648

MC10105P

AWLYYWW

= PIN 1

= PIN 16

= PIN 8

CC1

CC2

PLCC–20

FN SUFFIX

CASE 775

10105

AWLYYWW

DIP

PIN ASSIGNMENT

= Assembly Location

CC2

CC1

OUT

WL = Wafer Lot

YY = Year

WW = Work Week

OUT

ORDERING INFORMATION

Device

Package

Shipping

OUT

MC10105L

CDIP–16

25 Units / Rail

MC10105P

PDIP–16

PLCC–20

25 Units / Rail

46 Units / Rail

MC10105FN

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables on page 18

of the ON Semiconductor MECL Data Book (DL122/D).

Semiconductor Components Industries, LLC, 2002

Publication Order Number:

January, 2002 – Rev. 7

MC10105/D

12 3 4 5 6 7 8

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MC10105FN	ONSEMI	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105FN	MOTOROLA	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105FNR2	ONSEMI	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105L	ONSEMI	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105L	MOTOROLA	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105LD	MOTOROLA	获取价格	OR/NOR Gate, ECL10K, CDIP16
MC10105LDS	MOTOROLA	获取价格	OR/NOR Gate, ECL10K, CDIP16
MC10105LR2	ONSEMI	获取价格	Triple 2-3-2-Input OR/NOR Gate