Datasheet > MC10105LR2

MC10105LR2

更新时间： 2024-02-05 14:28:18

品牌	Logo	应用领域
安森美 - ONSEMI		栅
页数	文件大小	规格书
5页	104K
描述
Triple 2-3-2-Input OR/NOR Gate

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数据手册

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MC10105LR2 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC10105 is a triple 2–3–2 input OR/NOR gate.

= 30 mW typ/gate (No Load)

= 2.0 ns typ

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

t , t = 2.0 ns typ (20%–80%)

r f

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

LOGIC DIAGRAM

FN SUFFIX

PLCC

CASE 775–02

DIP

PIN ASSIGNMENT

CC2

CC1

OUT

= PIN 1

= PIN 16

= PIN 8

CC1

CC2

OUT

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–11 of the Motorola MECL Data

Book (DL122/D).

3/93

Motorola, Inc. 1996

REV 5

3–21

12 3 4 5

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与MC10105LR2相关器件

型号	品牌	获取价格	描述	数据表
MC10105LS	MOTOROLA	获取价格	OR/NOR Gate, ECL10K, CDIP16
MC10105P	ONSEMI	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105P	MOTOROLA	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105P1	MOTOROLA	获取价格	OR/NOR Gate, ECL10K, PDIP16
MC10105PD	MOTOROLA	获取价格	OR/NOR Gate, ECL10K, PDIP16
MC10105PDS	ROCHESTER	获取价格	OR/NOR Gate
MC10105PR2	ONSEMI	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105PS	MOTOROLA	获取价格	OR/NOR Gate, ECL10K, PDIP16
MC10105PS	ROCHESTER	获取价格	OR/NOR Gate
MC10106	ONSEMI	获取价格	Triple 4-3-3-Input NOR Gate