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MB90050

更新时间： 2024-02-05 14:38:32
品牌 Logo 应用领域
富士通 - FUJITSU 显示控制器
页数 文件大小 规格书
41页 746K
描述
On-Screen Display Controller

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MB90050 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QFP, QFP48,.6SQ,32Reach Compliance Code：compliant
风险等级：5.83Is Samacsys：N
地址总线宽度：最大时钟频率：20 MHz
显示配置：35 X 16 CHARACTERS外部数据总线宽度：
JESD-30 代码：S-PQFP-G48JESD-609代码：e0
长度：12 mm端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP48,.6SQ,32封装形状：SQUARE
封装形式：FLATPACK峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V认证状态：Not Qualified
座面最大高度：2.7 mm子类别：Display Controllers
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.8 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：12 mm
uPs/uCs/外围集成电路类型：DISPLAY CONTROLLER, CRT CHARACTER OR GRAPHICS DISPLAYBase Number Matches：1

MB90050 数据手册

 浏览型号MB90050的Datasheet PDF文件第3页浏览型号MB90050的Datasheet PDF文件第4页浏览型号MB90050的Datasheet PDF文件第5页浏览型号MB90050的Datasheet PDF文件第7页浏览型号MB90050的Datasheet PDF文件第8页浏览型号MB90050的Datasheet PDF文件第9页 
MB90050  
Pin  
no.  
Pin  
name  
Circuit  
type  
I/O  
Function  
Vertical sync signal output pin.  
The pin enables output (ON/OFF) control, output logic control, and internal pull-  
up ON/OFF control depending on the command setting.  
When the RESET pin inputs the low level signal, this pin turns off the internal  
pull-up resistor and sets the output to OFF (output tied to the high).  
9
VSYNCO  
O
F
F
F
F
Horizontal sync signal output pin.  
The pin enables output (ON/OFF) control, output logic control, and internal pull-  
up ON/OFF control depending on the command setting.  
When the RESET pin inputs the low level signal, this pin turns off the internal  
pull-up resistor and sets the output to OFF (output tied to the high).  
10 HSYNCO  
11 CSYNCO  
O
O
O
Composite sync signal output pin.  
The pin enables output (ON/OFF) control, output logic control, and internal pull-  
up ON/OFF control depending on the command setting.  
When the RESET pin inputs the low level signal, this pin turns off the internal  
pull-up resistor and sets the output to OFF (output tied to the high).  
Vertical blanking interval (VBI) output pin.  
The pin enables output (ON/OFF) control, output logic control, and internal pull-  
up ON/OFF control depending on the command setting.  
When the RESET pin inputs the low level signal, this pin turns off the internal  
pull-up resistor and sets the output to OFF (output tied to the low).  
12  
13  
VBLKO  
Field signal output pin.  
During operation under internal synchronization control, this pin outputs the in-  
ternally generated field signal.  
During operation under external synchronization control, the pin outputs the  
field signal (internally detected field signal or external input field signal) used for  
internal operations.  
FLDO  
O
F
The pin enables output (ON/OFF) control, output logic control, and internal pull-  
up ON/OFF control depending on the command setting.  
When the RESET pin inputs the low level signal, this pin turns off the internal  
pull-up resistor and sets the output to OFF (output tied to the low).  
Synchronization detection signal output pin.  
This pin outputs a significant level signal with a sync signal detected and an in-  
significant level signal with no sync signal detected.  
14  
SYNCST  
O
F
The pin enables output (ON/OFF) control, output logic control, and internal pull-  
up ON/OFF control depending on the command setting.  
When the RESET pin inputs the low level signal, this pin turns off the internal  
pull-up resistor and sets the output to OFF (output tied to the low).  
(Continued)  
6
1...3456789...41

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