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MB2373BB

更新时间： 2024-01-23 08:41:36
品牌 Logo 应用领域
恩智浦 - NXP 锁存器
页数 文件大小 规格书
11页 119K
描述
Dual octal transparent latch 3-State

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中文翻译

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MB2373BB 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：QFP, QFP52,.52SQReach Compliance Code：unknown
风险等级：5.92JESD-30 代码：S-PQFP-G52
JESD-609代码：e0负载电容（CL）：50 pF
逻辑集成电路类型：D LATCH最大I（ol）：0.064 A
位数：8功能数量：2
端子数量：52最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP52,.52SQ封装形状：SQUARE
封装形式：FLATPACK包装方法：TAPE AND REEL
电源：5 V认证状态：Not Qualified
子类别：FF/Latches标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.635 mm
端子位置：QUAD

MB2373BB 数据手册

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Philips Semiconductors Advanced BiCMOS Products  
Product specification  
Dual octal transparent latch (3-State)  
MB2373  
one setup time before the High-to-Low  
enable transition.  
FEATURES  
• 16-bit transparent latch  
DESCRIPTION  
The MB2373 high-performance BiCMOS  
device combines low static and dynamic  
power dissipation with high speed and high  
output drive.  
The 3-State output buffers are designed to  
drive heavily loaded 3-State buses, MOS  
memories, or MOS microprocessors. Each  
active-Low Output Enable (nOE) controls  
eight 3-State buffers independent of the latch  
operation.  
• Multiple V and GND pins minimize  
CC  
switching noise  
• Power-up 3-State  
The MB2373 device is a dual octal  
transparent latch coupled to two sets of eight  
3-State output buffers. The two sections of  
the device are controlled independently by  
Enable (nE) and Output Enable (nOE) control  
gates.  
• Live insertion/extraction permitted  
• Power-up reset  
When nOE is Low, the latched or transparent  
data appears at the outputs. When nOE is  
High, the outputs are in the High–impedance  
“OFF” state, which means they will neither  
drive nor load the bus.  
• 3-State output buffers  
• Output capability: +64mA/–32mA  
The data on each set of D inputs are  
transferred to the latch outputs when the  
Latch Enable (nE) input is High. The latch  
remains transparent to the data inputs while  
nE is High, and stores the data that is present  
• Latch-up protection exceeds 500mA per  
JEDEC JC40.2 Std 17  
• ESD protection exceeds 2000V per MIL  
STD 883 Method 3015 and 200V per  
Machine Model  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
Dn to Qn  
PLH  
PHL  
C = 50pF; V = 5V  
2.9  
ns  
L
CC  
C
Input capacitance  
Output capacitance  
Total supply current  
V = 0V or V  
CC  
4
7
pF  
pF  
nA  
IN  
I
C
V
= 0V or V ; 3-State  
O CC  
OUT  
CCZ  
I
Outputs disabled; V = 5.5V  
500  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE  
–40°C to +85°C  
ORDER CODE  
DRAWING NUMBER  
52–pin plastic Quad Flat Pack  
MB2373BB  
1418B  
PIN CONFIGURATION  
LOGIC SYMBOL  
52 51 50 49 48 47 46 45 44 43 42 41 40  
1
39  
V
V
CC  
47  
45  
1E  
CC  
19  
21  
2E  
1Q4  
2
3
4
38 1D4  
37 1D5  
36 GND  
1Q5  
1OE  
2OE  
48  
49  
51  
52  
1Q0  
1Q1  
1Q2  
1Q3  
GND  
44  
43  
41  
40  
1D0  
1D1  
1D2  
1D3  
8
9
2Q0  
2Q1  
2Q2  
2Q3  
32  
31  
29  
28  
2D0  
1Q6  
1Q7  
GND  
2Q0  
5
6
7
8
35 1D6  
34 1D7  
33 GND  
32 2D0  
2D21  
2D2  
MB2373  
52–pin PQFP  
11  
12  
2D3  
2
3
5
6
1Q4  
1Q5  
1Q6  
1Q7  
38  
37  
35  
34  
1D4  
1D5  
1D6  
1D7  
14  
15  
17  
18  
2Q4  
2Q5  
2Q6  
2Q7  
26  
25  
23  
22  
2D4  
2D5  
2D6  
2D7  
2Q1  
9
31 2D1  
30 GND  
29 2D2  
28 2D3  
GND 10  
2Q2 11  
2Q3 12  
13  
27  
V
V
CC  
CC  
14 15 16 17 18 19 20 21 22 23 24 25 26  
1
August 23, 1993  
853-1669 10587  
1234567...11

中文翻译

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