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MAX9986ETP-T PDF预览

MAX9986ETP-T

更新时间: 2024-01-31 23:45:52
品牌 Logo 应用领域
美信 - MAXIM 射频和微波射频上变频器射频下变频器微波上变频器微波下变频器开关信息通信管理
页数 文件大小 规格书
12页 1032K
描述
SiGe High-Linearity, 815MHz to 995MHz Downconversion Mixer with LO Buffer/Switch

MAX9986ETP-T 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:5 X 5 MM, QFN-20
Reach Compliance Code:not_compliant风险等级:5.12
Is Samacsys:N特性阻抗:50 Ω
构造:COMPONENT下变频增益-最小值:9 dB
最大中频频率:250 MHz最小中频频率:50 MHz
JESD-609代码:e0LO 可调谐:YES
安装特点:SURFACE MOUNT最大噪声指数:9.3 dB
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装等效代码:LCC20,.20SQ,25电源:5 V
最大射频输入频率:995 MHz最小射频输入频率:815 MHz
射频/微波设备类型:DOWN CONVERTER子类别:RF/Microwave Up/Down Converters
最大压摆率:265 mA表面贴装:YES
技术:BICMOS端子面层:Tin/Lead (Sn/Pb)
Base Number Matches:1

MAX9986ETP-T 数据手册

 浏览型号MAX9986ETP-T的Datasheet PDF文件第6页浏览型号MAX9986ETP-T的Datasheet PDF文件第7页浏览型号MAX9986ETP-T的Datasheet PDF文件第8页浏览型号MAX9986ETP-T的Datasheet PDF文件第10页浏览型号MAX9986ETP-T的Datasheet PDF文件第11页浏览型号MAX9986ETP-T的Datasheet PDF文件第12页 
SiGe High-Linearity, 815MHz to 995MHz  
Downconversion Mixer with LO Buffer/Switch  
A two-stage internal LO buffer allows a wide input  
power range for the LO drive. All guaranteed specifica-  
tions are for an LO signal power from -3dBm to +3dBm.  
The on-chip low-loss balun, along with an LO buffer,  
drives the double-balanced mixer. All interfacing and  
matching components from the LO inputs to the IF out-  
puts are integrated on-chip.  
optimize the performance for a particular frequency  
band. Since approximately 140mA flows through this  
inductor, it is important to use a low-DCR wire-wound coil.  
If the LO-to-IF and RF-to-IF leakage are not critical  
parameters, the inductor can be replaced by a short  
circuit to ground.  
Layout Considerations  
A properly designed PC board is an essential part of  
any RF/microwave circuit. Keep RF signal lines as short  
as possible to reduce losses, radiation, and induc-  
tance. For the best performance, route the ground pin  
traces directly to the exposed pad under the package.  
The PC board exposed pad MUST be connected to the  
ground plane of the PC board. It is suggested that mul-  
tiple vias be used to connect this pad to the lower level  
ground planes. This method provides a good RF/ther-  
mal conduction path for the device. Solder the exposed  
pad on the bottom of the device package to the PC  
board. The MAX9986 Evaluation Kit can be used as a  
reference for board layout. Gerber files are available  
upon request at www.maxim-ic.com.  
High-Linearity Mixer  
The core of the MAX9986 is a double-balanced, high-  
performance passive mixer. Exceptional linearity is pro-  
vided by the large LO swing from the on-chip LO  
buffer. When combined with the integrated IF ampli-  
fiers, the cascaded IIP3, 2LO-2RF rejection, and NF  
performance is typically 23.6dBm, 67dBc, and 9.3dB,  
respectively.  
Differential IF Output Amplifier  
The MAX9986 mixer has a 50MHz to 250MHz IF fre-  
quency range. The differential, open-collector IF output  
ports require external pullup inductors to V . Note that  
CC  
these differential outputs are ideal for providing  
enhanced 2LO-2RF rejection performance. Single-  
ended IF applications require a 4:1 balun to transform  
the 200differential output impedance to a 50single-  
ended output.  
Power-Supply Bypassing  
Proper voltage-supply bypassing is essential for high-  
frequency circuit stability. Bypass each V  
pin and  
CC  
TAP with the capacitors shown in the Typical Application  
Circuit; see Table 1. Place the TAP bypass capacitor to  
ground within 100 mils of the TAP pin.  
Applications Information  
Input and Output Matching  
The RF and LO inputs are internally matched to 50. No  
matching components are required. RF and LO inputs  
require only DC-blocking capacitors for interfacing.  
Exposed Pad RF/Thermal Considerations  
The exposed paddle (EP) of the MAX9986’s 20-pin thin  
QFN-EP package provides a low thermal-resistance  
path to the die. It is important that the PC board on  
which the MAX9986 is mounted be designed to con-  
duct heat from the EP. In addition, provide the EP with  
a low-inductance path to electrical ground. The EP  
MUST be soldered to a ground plane on the PC board,  
either directly or through an array of plated via holes.  
The IF output impedance is 200(differential). For  
evaluation, an external low-loss 4:1 (impedance ratio)  
balun transforms this impedance down to a 50single-  
ended output (see the Typical Application Circuit).  
Bias Resistors  
Bias currents for the LO buffer and the IF amplifier are  
optimized by fine tuning resistors R1 and R2. If  
reduced current is required at the expense of perfor-  
mance, contact the factory for details. If the 1% bias  
resistor values are not readily available, substitute stan-  
dard 5% values.  
Chip Information  
TRANSISTOR COUNT: 1017  
PROCESS: SiGe BiCMOS  
LEXT Inductor  
LEXT serves to improve the LO-to-IF and RF-to-IF leak-  
age. The inductance value can be adjusted by the user to  
_______________________________________________________________________________________  
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